Initial bootloader commit
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EFR32MG24/Device/Include/system_efr32mg24.h
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EFR32MG24/Device/Include/system_efr32mg24.h
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/**************************************************************************//**
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* @file
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* @brief CMSIS system header file for EFR32MG24
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******************************************************************************
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* # License
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* <b>Copyright 2022 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#ifndef SYSTEM_EFR32MG24_H
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#define SYSTEM_EFR32MG24_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/***************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup EFR32MG24 EFR32MG24
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* @{
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******************************************************************************/
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/*******************************************************************************
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****************************** TYPEDEFS ***********************************
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******************************************************************************/
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/* Interrupt vectortable entry */
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typedef union {
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void (*VECTOR_TABLE_Type)(void);
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void *topOfStack;
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} tVectorEntry;
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/*******************************************************************************
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************************** GLOBAL VARIABLES *******************************
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******************************************************************************/
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#if !defined(SYSTEM_NO_STATIC_MEMORY)
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extern uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
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extern uint32_t SystemHfrcoFreq; /**< System HFRCO frequency */
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#endif
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/*Re-direction of IRQn.*/
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#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
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#if defined (SL_TRUSTZONE_SECURE)
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#define SMU_PRIVILEGED_IRQn SMU_S_PRIVILEGED_IRQn
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#else
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#define SMU_PRIVILEGED_IRQn SMU_NS_PRIVILEGED_IRQn
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#endif /* SL_TRUSTZONE_SECURE */
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#endif /* _SILICON_LABS_32B_SERIES_2_CONFIG */
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/*Re-direction of IRQHandler.*/
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#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
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#if defined (SL_TRUSTZONE_SECURE)
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#define SMU_PRIVILEGED_IRQHandler SMU_S_PRIVILEGED_IRQHandler
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#else
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#define SMU_PRIVILEGED_IRQHandler SMU_NS_PRIVILEGED_IRQHandler
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#endif /* SL_TRUSTZONE_SECURE */
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#endif /* _SILICON_LABS_32B_SERIES_2_CONFIG */
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/*******************************************************************************
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***************************** PROTOTYPES **********************************
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******************************************************************************/
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void Reset_Handler(void); /**< Reset Handler */
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void NMI_Handler(void); /**< NMI Handler */
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void HardFault_Handler(void); /**< Hard Fault Handler */
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void MemManage_Handler(void); /**< MPU Fault Handler */
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void BusFault_Handler(void); /**< Bus Fault Handler */
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void UsageFault_Handler(void); /**< Usage Fault Handler */
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void SecureFault_Handler(void); /**< Secure Fault Handler */
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void SVC_Handler(void); /**< SVCall Handler */
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void DebugMon_Handler(void); /**< Debug Monitor Handler */
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void PendSV_Handler(void); /**< PendSV Handler */
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void SysTick_Handler(void); /**< SysTick Handler */
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/* Part Specific Interrupts */
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void SMU_SECURE_IRQHandler(void); /**< SMU_SECURE IRQ Handler */
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void SMU_S_PRIVILEGED_IRQHandler(void); /**< SMU_S_PRIVILEGED IRQ Handler */
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void SMU_NS_PRIVILEGED_IRQHandler(void); /**< SMU_NS_PRIVILEGED IRQ Handler */
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void EMU_IRQHandler(void); /**< EMU IRQ Handler */
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void TIMER0_IRQHandler(void); /**< TIMER0 IRQ Handler */
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void TIMER1_IRQHandler(void); /**< TIMER1 IRQ Handler */
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void TIMER2_IRQHandler(void); /**< TIMER2 IRQ Handler */
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void TIMER3_IRQHandler(void); /**< TIMER3 IRQ Handler */
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void TIMER4_IRQHandler(void); /**< TIMER4 IRQ Handler */
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void USART0_RX_IRQHandler(void); /**< USART0_RX IRQ Handler */
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void USART0_TX_IRQHandler(void); /**< USART0_TX IRQ Handler */
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void EUSART0_RX_IRQHandler(void); /**< EUSART0_RX IRQ Handler */
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void EUSART0_TX_IRQHandler(void); /**< EUSART0_TX IRQ Handler */
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void EUSART1_RX_IRQHandler(void); /**< EUSART1_RX IRQ Handler */
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void EUSART1_TX_IRQHandler(void); /**< EUSART1_TX IRQ Handler */
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void MVP_IRQHandler(void); /**< MVP IRQ Handler */
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void ICACHE0_IRQHandler(void); /**< ICACHE0 IRQ Handler */
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void BURTC_IRQHandler(void); /**< BURTC IRQ Handler */
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void LETIMER0_IRQHandler(void); /**< LETIMER0 IRQ Handler */
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void SYSCFG_IRQHandler(void); /**< SYSCFG IRQ Handler */
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void MPAHBRAM_IRQHandler(void); /**< MPAHBRAM IRQ Handler */
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void LDMA_IRQHandler(void); /**< LDMA IRQ Handler */
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void LFXO_IRQHandler(void); /**< LFXO IRQ Handler */
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void LFRCO_IRQHandler(void); /**< LFRCO IRQ Handler */
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void ULFRCO_IRQHandler(void); /**< ULFRCO IRQ Handler */
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void GPIO_ODD_IRQHandler(void); /**< GPIO_ODD IRQ Handler */
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void GPIO_EVEN_IRQHandler(void); /**< GPIO_EVEN IRQ Handler */
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void I2C0_IRQHandler(void); /**< I2C0 IRQ Handler */
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void I2C1_IRQHandler(void); /**< I2C1 IRQ Handler */
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void EMUDG_IRQHandler(void); /**< EMUDG IRQ Handler */
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void AGC_IRQHandler(void); /**< AGC IRQ Handler */
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void BUFC_IRQHandler(void); /**< BUFC IRQ Handler */
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void FRC_PRI_IRQHandler(void); /**< FRC_PRI IRQ Handler */
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void FRC_IRQHandler(void); /**< FRC IRQ Handler */
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void MODEM_IRQHandler(void); /**< MODEM IRQ Handler */
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void PROTIMER_IRQHandler(void); /**< PROTIMER IRQ Handler */
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void RAC_RSM_IRQHandler(void); /**< RAC_RSM IRQ Handler */
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void RAC_SEQ_IRQHandler(void); /**< RAC_SEQ IRQ Handler */
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void HOSTMAILBOX_IRQHandler(void); /**< HOSTMAILBOX IRQ Handler */
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void SYNTH_IRQHandler(void); /**< SYNTH IRQ Handler */
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void ACMP0_IRQHandler(void); /**< ACMP0 IRQ Handler */
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void ACMP1_IRQHandler(void); /**< ACMP1 IRQ Handler */
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void WDOG0_IRQHandler(void); /**< WDOG0 IRQ Handler */
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void WDOG1_IRQHandler(void); /**< WDOG1 IRQ Handler */
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void HFXO0_IRQHandler(void); /**< HFXO0 IRQ Handler */
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void HFRCO0_IRQHandler(void); /**< HFRCO0 IRQ Handler */
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void HFRCOEM23_IRQHandler(void); /**< HFRCOEM23 IRQ Handler */
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void CMU_IRQHandler(void); /**< CMU IRQ Handler */
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void AES_IRQHandler(void); /**< AES IRQ Handler */
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void IADC_IRQHandler(void); /**< IADC IRQ Handler */
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void MSC_IRQHandler(void); /**< MSC IRQ Handler */
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void DPLL0_IRQHandler(void); /**< DPLL0 IRQ Handler */
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void EMUEFP_IRQHandler(void); /**< EMUEFP IRQ Handler */
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void DCDC_IRQHandler(void); /**< DCDC IRQ Handler */
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void PCNT0_IRQHandler(void); /**< PCNT0 IRQ Handler */
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void SW0_IRQHandler(void); /**< SW0 IRQ Handler */
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void SW1_IRQHandler(void); /**< SW1 IRQ Handler */
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void SW2_IRQHandler(void); /**< SW2 IRQ Handler */
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void SW3_IRQHandler(void); /**< SW3 IRQ Handler */
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void KERNEL0_IRQHandler(void); /**< KERNEL0 IRQ Handler */
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void KERNEL1_IRQHandler(void); /**< KERNEL1 IRQ Handler */
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void M33CTI0_IRQHandler(void); /**< M33CTI0 IRQ Handler */
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void M33CTI1_IRQHandler(void); /**< M33CTI1 IRQ Handler */
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void FPUEXH_IRQHandler(void); /**< FPUEXH IRQ Handler */
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void SETAMPERHOST_IRQHandler(void); /**< SETAMPERHOST IRQ Handler */
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void SEMBRX_IRQHandler(void); /**< SEMBRX IRQ Handler */
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void SEMBTX_IRQHandler(void); /**< SEMBTX IRQ Handler */
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void SYSRTC_APP_IRQHandler(void); /**< SYSRTC_APP IRQ Handler */
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void SYSRTC_SEQ_IRQHandler(void); /**< SYSRTC_SEQ IRQ Handler */
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void KEYSCAN_IRQHandler(void); /**< KEYSCAN IRQ Handler */
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void RFECA0_IRQHandler(void); /**< RFECA0 IRQ Handler */
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void RFECA1_IRQHandler(void); /**< RFECA1 IRQ Handler */
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void VDAC0_IRQHandler(void); /**< VDAC0 IRQ Handler */
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void VDAC1_IRQHandler(void); /**< VDAC1 IRQ Handler */
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void AHB2AHB0_IRQHandler(void); /**< AHB2AHB0 IRQ Handler */
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void AHB2AHB1_IRQHandler(void); /**< AHB2AHB1 IRQ Handler */
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#if (__FPU_PRESENT == 1)
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void FPUEH_IRQHandler(void); /**< FPU IRQ Handler */
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#endif
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uint32_t SystemHCLKGet(void);
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/**************************************************************************//**
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* @brief
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* Update CMSIS SystemCoreClock variable.
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*
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* @details
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* CMSIS defines a global variable SystemCoreClock that shall hold the
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* core frequency in Hz. If the core frequency is dynamically changed, the
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* variable must be kept updated in order to be CMSIS compliant.
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*
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* Notice that only if changing the core clock frequency through the EMLIB
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* CMU API, this variable will be kept updated. This function is only
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* provided for CMSIS compliance and if a user modifies the the core clock
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* outside the EMLIB CMU API.
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*****************************************************************************/
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static __INLINE uint32_t SystemCoreClockGet(void)
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{
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return SystemHCLKGet();
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}
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/**************************************************************************//**
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* @brief
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* Update CMSIS SystemCoreClock variable.
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*
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* @details
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* CMSIS defines a global variable SystemCoreClock that shall hold the
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* core frequency in Hz. If the core frequency is dynamically changed, the
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* variable must be kept updated in order to be CMSIS compliant.
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*
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* Notice that only if changing the core clock frequency through the EMLIB
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* CMU API, this variable will be kept updated. This function is only
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* provided for CMSIS compliance and if a user modifies the the core clock
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* outside the EMLIB CMU API.
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*****************************************************************************/
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static __INLINE void SystemCoreClockUpdate(void)
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{
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SystemHCLKGet();
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}
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void SystemInit(void);
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uint32_t SystemHFRCODPLLClockGet(void);
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void SystemHFRCODPLLClockSet(uint32_t freq);
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uint32_t SystemSYSCLKGet(void);
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uint32_t SystemMaxCoreClockGet(void);
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uint32_t SystemFSRCOClockGet(void);
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uint32_t SystemHFXOClockGet(void);
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void SystemHFXOClockSet(uint32_t freq);
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uint32_t SystemCLKIN0Get(void);
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uint32_t SystemHFRCOEM23ClockGet(void);
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uint32_t SystemLFXOClockGet(void);
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void SystemLFXOClockSet(uint32_t freq);
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uint32_t SystemLFRCOClockGet(void);
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uint32_t SystemULFRCOClockGet(void);
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/** @} End of group */
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/** @} End of group Parts */
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#ifdef __cplusplus
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}
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#endif
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#endif /* SYSTEM_EFR32MG24_H */
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