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GClarkson
2025-04-12 23:37:19 +01:00
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Libs/platform/radio/rail_lib/chip/efr32/efr32xg2x/rail_chip_specific.h Normal file
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/***************************************************************************//**
* @file
* @brief This file contains the type definitions for EFR32xG2x chip-specific
* aspects of RAIL.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifdef SLI_LIBRARY_BUILD
// This file should not be included when doing SLI_LIBRARY_BUILDs
#else//!SLI_LIBRARY_BUILD
#ifndef __RAIL_CHIP_SPECIFIC_H_
#if !defined(__RAIL_TYPES_H__) && !defined(DOXYGEN_SHOULD_SKIP_THIS)
#warning rail_chip_specific.h should only be included by rail_types.h
#include "rail_types.h" // Force rail_chip_specific.h only within rail_types.h
#else // __RAIL_TYPES_H__
/// Include guard
#define __RAIL_CHIP_SPECIFIC_H_
#include "sl_status.h"
#include "rail_features.h"
#ifdef RAIL_INTERNAL_BUILD
#include "rail_chip_specific_internal.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************
* General Structures
*****************************************************************************/
/**
* @addtogroup General_EFR32XG2X EFR32xG2x
* @ingroup General
* @{
* @brief Types specific to the EFR32xG2x for general configuration.
*/
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/**
* @def RAIL_EFR32XG21_STATE_BUFFER_BYTES
* @brief The EFR32xG21 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG21_STATE_BUFFER_BYTES 592
/**
* @def RAIL_EFR32XG22_STATE_BUFFER_BYTES
* @brief The EFR32xG22 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG22_STATE_BUFFER_BYTES 608
/**
* @def RAIL_EFR32XG23_STATE_BUFFER_BYTES
* @brief The EFR32xG23 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG23_STATE_BUFFER_BYTES 616
/**
* @def RAIL_EFR32XG24_STATE_BUFFER_BYTES
* @brief The EFR32xG24 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG24_STATE_BUFFER_BYTES 632
/**
* @def RAIL_EFR32XG25_STATE_BUFFER_BYTES
* @brief The EFR32xG25 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG25_STATE_BUFFER_BYTES 632
/**
* @def RAIL_EFR32XG26_STATE_BUFFER_BYTES
* @brief The EFR32xG26 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG26_STATE_BUFFER_BYTES 632
/**
* @def RAIL_EFR32XG27_STATE_BUFFER_BYTES
* @brief The EFR32xG27 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG27_STATE_BUFFER_BYTES 608
/**
* @def RAIL_EFR32XG28_STATE_BUFFER_BYTES
* @brief The EFR32xG28 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG28_STATE_BUFFER_BYTES 624
/**
* @def RAIL_EFR32XG29_STATE_BUFFER_BYTES
* @brief The EFR32XG29 series size needed for
* \ref RAIL_StateBufferEntry_t::bufferBytes.
*/
#define RAIL_EFR32XG29_STATE_BUFFER_BYTES 608
#ifndef RAIL_STATE_BUFFER_BYTES
/**
* @def RAIL_STATE_BUFFER_BYTES
* @brief The size needed for \ref RAIL_StateBufferEntry_t::bufferBytes
* on this platform for this radio. This compile-time size may be slightly
* larger than what \ref RAIL_GetStateBufferSize() determines at run-time.
*/
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 1)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG21_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 2)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG22_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG23_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 4)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG24_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG25_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 6)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG26_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 7)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG27_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG28_STATE_BUFFER_BYTES
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)
#define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG29_STATE_BUFFER_BYTES
#else
#define RAIL_STATE_BUFFER_BYTES 0 // Sate Doxygen
#error "Unsupported platform!"
#endif
#endif //#ifndef RAIL_STATE_BUFFER_BYTES
#endif//DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/**
* @def RAIL_SEQ_IMAGE_1
* @brief A macro for the first sequencer image.
*/
#define RAIL_SEQ_IMAGE_1 1
/**
* @def RAIL_SEQ_IMAGE_2
* @brief A macro for the second sequencer image.
*/
#define RAIL_SEQ_IMAGE_2 2
#ifndef RAIL_INTERNAL_BUILD
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
/**
* @def RAIL_SEQ_IMAGE_PA_10_DBM
* @brief A chip-specific macro for the sequencer image used on EFR32xG24 and EFR32xG26 OPNs
* with a 10 dBm PA.
*/
#define RAIL_SEQ_IMAGE_PA_10_DBM RAIL_SEQ_IMAGE_1
/**
* @def RAIL_SEQ_IMAGE_PA_20_DBM
* @brief A chip-specific macro for the sequencer image used on EFR32xG24 and EFR32xG26 OPNs
* with a 20 dBm PA.
*/
#define RAIL_SEQ_IMAGE_PA_20_DBM RAIL_SEQ_IMAGE_2
/**
* @def RAIL_SEQ_IMAGE_COUNT
* @brief A macro for the total number of sequencer images supported on the
* platform.
*/
#define RAIL_SEQ_IMAGE_COUNT 2
#else //((_SILICON_LABS_32B_SERIES_2_CONFIG != 4) && (_SILICON_LABS_32B_SERIES_2_CONFIG != 6))
/**
* @def RAIL_SEQ_IMAGE_DEFAULT
* @brief A chip-specific macro for the default sequencer image on platforms
* that support only one sequencer image.
*/
#define RAIL_SEQ_IMAGE_DEFAULT RAIL_SEQ_IMAGE_1
/**
* @def RAIL_SEQ_IMAGE_COUNT
* @brief A macro for the total number of sequencer images supported on the
* platform.
*/
#define RAIL_SEQ_IMAGE_COUNT 1
#endif //((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
#endif //RAIL_INTERNAL_BUILD
/**
* @struct RAIL_RffpllConfig_t
* @brief Stores information relevant to the Radio-Friendly Frequency
* Phase-Locked Loop (RFFPLL) for the PHY configuration currently loaded in
* memory.
*/
typedef struct {
/** Divider X (Modem Clock), Divider Y (M33 System Clock), and Divider N (Feedback) values. */
uint32_t dividers;
/** Radio clock frequency in Hz. */
uint32_t radioFreqHz;
/** System clock frequency in Hz. */
uint32_t sysclkFreqHz;
} RAIL_RffpllConfig_t;
/**
* @def RAIL_RFFPLL_DIVIDERX_MASK
* @brief Bit mask for RFFPLL DIVX in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERX_MASK 0x000000FFUL
/**
* @def RAIL_RFFPLL_DIVIDERX_SHIFT
* @brief Shift value for RFFPLL DIVX in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERX_SHIFT 0
/**
* @def RAIL_RFFPLL_DIVIDERY_MASK
* @brief Bit mask for RFFPLL DIVY in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERY_MASK 0x0000FF00UL
/**
* @def RAIL_RFFPLL_DIVIDERY_SHIFT
* @brief Shift value for RFFPLL DIVY in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERY_SHIFT 8
/**
* @def RAIL_RFFPLL_DIVIDERN_MASK
* @brief Bit mask for RFFPLL DIVN in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERN_MASK 0x00FF0000UL
/**
* @def RAIL_RFFPLL_DIVIDERN_SHIFT
* @brief Shift value for RFFPLL DIVN in \ref RAIL_RffpllConfig_t::dividers.
*/
#define RAIL_RFFPLL_DIVIDERN_SHIFT 16
/**
* @typedef RAIL_TimerTick_t
* @brief Internal RAIL hardware timer tick that drives the RAIL timebase.
* A tick is roughly 0.5 microseconds but it wraps somewhat before
* 0xFFFFFFFF giving a time range of about 17 minutes.
*
* @note \ref RAIL_TimerTicksToUs() can be used to convert the delta between
* two \ref RAIL_TimerTick_t values to microseconds.
*/
typedef uint32_t RAIL_TimerTick_t;
/**
* @def RAIL_GetTimerTick(timerTickType)
* @brief The RAIL hardware timer ticks value.
*
* @note timerTickType is added for compatibility reasons and is ignored here;
* this gets the equivalent of \ref RAIL_TIMER_TICK_DEFAULT.
*/
#define RAIL_GetTimerTick(timerTickType) (*RAIL_TimerTick)
/**
* A global pointer to the memory address of the 32-bit
* \ref RAIL_TimerTick_t internal RAIL hardware timer that drives
* the RAIL timebase.
* Equivalent to \ref RAIL_TimerTick_t for its granularity and range.
*/
extern const volatile uint32_t *RAIL_TimerTick;
/**
* A global pointer to the memory address of the internal RAIL hardware timer
* that captures the latest RX packet reception time.
* See \ref RAIL_TimerTick_t for its granularity and range.
*
* @note This would not include the RX chain delay, so may not exactly
* correspond to the \ref RAIL_Time_t packet timestamp available within
* \ref RAIL_RxPacketDetails_t::timeReceived which reflects the actual
* on-air time that the packet finished.
*/
extern const volatile uint32_t *RAIL_RxPacketTimestamp;
/**
* Get elapsed time, in microseconds, between two \ref RAIL_TimerTick_t ticks.
*
* @param[in] startTick Tick recorded at the start of the operation.
* @param[in] endTick Tick recorded at the end of the operation.
* @return The elapsed time, in microseconds, between two timer ticks.
*/
RAIL_Time_t RAIL_TimerTicksToUs(RAIL_TimerTick_t startTick,
RAIL_TimerTick_t endTick);
/**
* Get \ref RAIL_TimerTick_t tick corresponding to a \ref RAIL_Time_t time.
*
* @param[in] microseconds Time in microseconds.
* @return The \ref RAIL_TimerTick_t tick corresponding to the
* \ref RAIL_Time_t time.
*/
RAIL_TimerTick_t RAIL_UsToTimerTicks(RAIL_Time_t microseconds);
#endif//DOXYGEN_SHOULD_SKIP_THIS
/** @} */ // end of group General_EFR32XG2X
/******************************************************************************
* Multiprotocol
*****************************************************************************/
/**
* @addtogroup Multiprotocol_EFR32XG2X EFR32xG2x
* @ingroup Multiprotocol
* @{
* @brief EFR32xG2x-specific multiprotocol support defines.
*/
/**
* @def TRANSITION_TIME_US
* @brief Time it takes to take care of protocol switching.
*/
#if _SILICON_LABS_32B_SERIES_2_CONFIG > 1
// XG22 + devices
#define TRANSITION_TIME_US 510
#else
// XG21
#define TRANSITION_TIME_US 500
#endif
/** @} */ // end of group Multiprotocol_EFR32XG2X
/******************************************************************************
* Calibration
*****************************************************************************/
/**
* @addtogroup Calibration_EFR32XG2X EFR32xG2x
* @ingroup Calibration
* @{
* @brief EFR32xG2x-specific Calibrations.
*/
/**
* @def RAIL_RF_PATHS_2P4GIG
* @brief Indicates the number of 2.4 GHz RF Paths suppported.
*/
#ifndef RAIL_RF_PATHS_2P4GIG
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 1) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
#define RAIL_RF_PATHS_2P4GIG 2
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_RF_PATHS_2P4GIG 1
#else
#define RAIL_RF_PATHS_2P4GIG 0
#endif
#endif//RAIL_RF_PATHS_2P4GHZ
/**
* @def RAIL_RF_PATHS_SUBGIG
* @brief Indicates the number of Sub-GHz RF Paths supported.
*/
#ifndef RAIL_RF_PATHS_SUBGHZ
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 3
#define RAIL_RF_PATHS_SUBGIG 2
#elif _SILICON_LABS_32B_SERIES_2_CONFIG == 5
#define RAIL_RF_PATHS_SUBGIG 2
#elif _SILICON_LABS_32B_SERIES_2_CONFIG == 8
#define RAIL_RF_PATHS_SUBGIG 1
#else
#define RAIL_RF_PATHS_SUBGIG 0
#endif
#endif//RAIL_RF_PATHS_SUBGHZ
/**
* @def RAIL_RF_PATHS
* @brief Indicates the number of RF Paths supported.
*/
#define RAIL_RF_PATHS (RAIL_RF_PATHS_SUBGIG + RAIL_RF_PATHS_2P4GIG)
#if (RAIL_RF_PATHS > RAIL_MAX_RF_PATHS)
#error "Update rail_types.h RAIL_MAX_RF_PATHS"
#endif
/**
* @def RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
* @brief Indicates this version of RAIL supports IR calibration on multiple RF paths
* Needed for backwards compatibility.
*/
#if RAIL_RF_PATHS > 1
#define RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS 1
#else
#ifdef DOXYGEN_SHOULD_SKIP_THIS // Leave undefined except for doxygen
#define RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS 0
#endif //DOXYGEN_SHOULD_SKIP_THIS
#endif //RAIL_RF_PATHS
/**
* @struct RAIL_ChannelConfigEntryAttr
* @brief A channel configuration entry attribute structure. Items listed
* are designed to be altered and updated during run-time.
*/
struct RAIL_ChannelConfigEntryAttr {
/** IR calibration attributes specific to each channel configuration entry. */
#if RAIL_SUPPORTS_OFDM_PA
RAIL_IrCalValues_t calValues;
#else//!RAIL_SUPPORTS_OFDM_PA
RAIL_RxIrCalValues_t calValues;
#endif//RAIL_SUPPORTS_OFDM_PA
};
/** @} */ // end of group Calibration_EFR32XG2X
/******************************************************************************
* Transmit
*****************************************************************************/
/**
* @addtogroup PA_EFR32XG2X EFR32xG2x
* @ingroup PA
* @{
* @brief Types specific to the EFR32xG2x for dealing with the on-chip PAs.
*/
#ifndef RAIL_TX_POWER_LEVEL_2P4_HP_MAX
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 1
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (180U)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN (1U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_MP_MAX (90U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_MP_MIN (1U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MAX (64U)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MIN (0U)
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
* EFR32xG24: capable of 20dBm max output power has max powerlevel:180
* EFR32xG24: capable of 10dBm max output power has max powerlevel:90
* EFR32xG26: capable of 20dBm max output power has max powerlevel:180
* EFR32xG26: capable of 10dBm max output power has max powerlevel:90
*/
#if defined (_SILICON_LABS_EFR32_2G4HZ_HP_PA_PRESENT) \
&& (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM > 10)
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (180U)
#else
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (90U)
#endif
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN (0U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MAX (15U)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MIN (0U)
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (127U)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN (0U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MAX (15U)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MIN (0U)
#elif _SILICON_LABS_32B_SERIES_2_CONFIG == 8
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (240)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN (1U)
#else //EFR32xG23
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MAX (240)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_HP_MIN (1U)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_MP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_MP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LLP_MAX (RAIL_TX_POWER_LEVEL_2P4_HP_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_2P4GIG_LLP mode.
*/
#define RAIL_TX_POWER_LEVEL_2P4_LLP_MIN (RAIL_TX_POWER_LEVEL_2P4_HP_MIN)
#endif //_SILICON_LABS_32B_SERIES_2_CONFIG
#endif //RAIL_TX_POWER_LEVEL_2P4_HP_MAX
#if RAIL_SUPPORTS_SUBGHZ_BAND
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when using
* a Sub-GHz PA mode.
*/
#ifndef RAIL_SUBGIG_MAX
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 3 || _SILICON_LABS_32B_SERIES_2_CONFIG == 8
#define RAIL_SUBGIG_MAX 240U
#elif _SILICON_LABS_32B_SERIES_2_CONFIG == 5
#define RAIL_SUBGIG_MAX 79U
#else
#define RAIL_SUBGIG_MAX 0U
#endif
#endif//RAIL_SUBGIG_MAX
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when using
* a Sub-GHz PA mode.
*/
#define RAIL_SUBGIG_MIN 1U
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX (RAIL_SUBGIG_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_HP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN (RAIL_SUBGIG_MIN)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MAX (RAIL_SUBGIG_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_MP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_MP_MIN (RAIL_SUBGIG_MIN)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MAX (RAIL_SUBGIG_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_LP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_LP_MIN (RAIL_SUBGIG_MIN)
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MAX (RAIL_SUBGIG_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_SUBGIG_LLP mode.
*/
#define RAIL_TX_POWER_LEVEL_SUBGIG_LLP_MIN (RAIL_SUBGIG_MIN)
#endif //RAIL_SUPPORTS_SUBGHZ_BAND
#if RAIL_SUPPORTS_OFDM_PA
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 5
#define RAIL_OFDM_PA_MAX 204U
#define RAIL_OFDM_PA_MULT 5U
#define RAIL_OFDM_PA_MIN 0U
#endif
/**
* The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE mode.
*/
#define RAIL_TX_POWER_LEVEL_OFDM_PA_MAX (RAIL_OFDM_PA_MAX)
/**
* The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
* RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE mode.
*/
#define RAIL_TX_POWER_LEVEL_OFDM_PA_MIN (RAIL_OFDM_PA_MIN)
#endif //RAIL_SUPPORTS_OFDM_PA
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_HP_MAX RAIL_TX_POWER_LEVEL_2P4_HP_MAX
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_HP_MIN RAIL_TX_POWER_LEVEL_2P4_HP_MIN
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_MP_MAX RAIL_TX_POWER_LEVEL_2P4_MP_MAX
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_MP_MIN RAIL_TX_POWER_LEVEL_2P4_MP_MIN
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_LP_MAX RAIL_TX_POWER_LEVEL_2P4_LP_MAX
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_LP_MIN RAIL_TX_POWER_LEVEL_2P4_LP_MIN
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_SUBGIG_MAX RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX
/** Backwards compatability define */
#define RAIL_TX_POWER_LEVEL_SUBGIG_MIN RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN
/**
* The number of PA's on this chip (including Virtual PAs).
*/
#ifndef RAIL_NUM_PA
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_NUM_PA (2U)
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#define RAIL_NUM_PA (4U)
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define RAIL_NUM_PA (5U)
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_NUM_PA (4U)
#else
#define RAIL_NUM_PA (3U)
#endif
#endif //#ifndef RAIL_NUM_PA
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
// Only those supported per-platform are defined, for use with #ifdef in
// apps or librail code.
#if RAIL_SUPPORTS_2P4GHZ_BAND
#define RAIL_TX_POWER_MODE_2P4GIG_HP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_HP)
#define RAIL_TX_POWER_MODE_2P4_HP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4_HP)
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 1
#define RAIL_TX_POWER_MODE_2P4GIG_MP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_MP)
#define RAIL_TX_POWER_MODE_2P4_MP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4_MP)
#endif//_SILICON_LABS_32B_SERIES_2_CONFIG == 1
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG != 3) && (_SILICON_LABS_32B_SERIES_2_CONFIG != 8))
#define RAIL_TX_POWER_MODE_2P4GIG_LP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_LP)
#define RAIL_TX_POWER_MODE_2P4_LP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4_LP)
#endif//((_SILICON_LABS_32B_SERIES_2_CONFIG != 3) && (_SILICON_LABS_32B_SERIES_2_CONFIG != 8))
#define RAIL_TX_POWER_MODE_2P4GIG_HIGHEST ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_HIGHEST)
#define RAIL_TX_POWER_MODE_2P4_HIGHEST ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4_HIGHEST)
#endif//RAIL_SUPPORTS_2P4GHZ_BAND
#if RAIL_SUPPORTS_SUBGHZ_BAND
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#define RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE)
#else//!RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#define RAIL_TX_POWER_MODE_SUBGIG_HP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_HP)
#define RAIL_TX_POWER_MODE_SUBGIG ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG)
#define RAIL_TX_POWER_MODE_SUBGIG_MP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_MP)
#define RAIL_TX_POWER_MODE_SUBGIG_LP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_LP)
#define RAIL_TX_POWER_MODE_SUBGIG_LLP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_LLP)
#endif//RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#define RAIL_TX_POWER_MODE_SUBGIG_HIGHEST ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG_HIGHEST)
#endif//RAIL_SUPPORTS_SUBGHZ_BAND
#if RAIL_SUPPORTS_OFDM_PA
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#define RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE)
#define RAIL_TX_POWER_MODE_OFDM_PA ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_OFDM_PA)
#endif//RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#endif//RAIL_SUPPORTS_OFDM_PA
#endif//DOXYGEN_SHOULD_SKIP_THIS
/** Convenience macro for any mapping table mode. */
#define RAIL_POWER_MODE_IS_ANY_DBM_POWERSETTING_MAPPING_TABLE(x) \
(((x) == RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE) \
|| ((x) == RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE))
/** Convenience macro to check if the power mode supports raw setting. */
#define RAIL_POWER_MODE_SUPPORTS_RAW_SETTING(x) \
(((x) != RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE) \
&& ((x) != RAIL_TX_POWER_MODE_SUBGIG_POWERSETTING_TABLE))
/** @} */ // end of group PA_EFR32XG2X
/******************************************************************************
* RX Channel Hopping
*****************************************************************************/
/**
* @addtogroup Rx_Channel_Hopping_EFR32XG2X EFR32xG2x
* @ingroup Rx_Channel_Hopping
* @{
* @brief EFR32xG2x-specific RX channel hopping.
*/
#if _SILICON_LABS_32B_SERIES_2_CONFIG == 8
/// The static amount of memory needed per channel for channel hopping, measured
/// in 32 bit words, regardless of the size of radio configuration structures.
#define RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL (65U)
#else
/// The static amount of memory needed per channel for channel hopping, measured
/// in 32 bit words, regardless of the size of radio configuration structures.
#define RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL (56U)
#endif
#if (RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL \
> RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL_WORST_CASE)
#error "Update rail_types.h RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL_WORST_CASE"
#endif
/** @} */ // end of group Rx_Channel_Hopping_EFR32XG2X
/******************************************************************************
* Sleep Structures
*****************************************************************************/
/**
* @addtogroup Sleep_EFR32XG2X EFR32xG2x
* @ingroup Sleep
* @{
* @brief EFR32xG2x-specific Sleeping.
*/
/// Default PRS channel to use when configuring sleep
#define RAIL_TIMER_SYNC_PRS_CHANNEL_DEFAULT (7U)
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
/// Default RTCC channel to use when configuring sleep
#define RAIL_TIMER_SYNC_RTCC_CHANNEL_DEFAULT (1U)
#else
/// Default RTCC channel to use when configuring sleep
#define RAIL_TIMER_SYNC_RTCC_CHANNEL_DEFAULT (0U)
#endif
/** @} */ // end of group Sleep_EFR32XG2X
/******************************************************************************
* State Transitions
*****************************************************************************/
/**
* @addtogroup State_Transitions_EFR32XG2X EFR32xG2x
* @ingroup State_Transitions
* @{
* @brief EFR32xG2x-specific State Transitions.
*/
/**
* @def RAIL_MINIMUM_TRANSITION_US
* @brief The minimum value for a consistent RAIL transition
* @note Transitions may need to be slower than this when using longer
* \ref RAIL_TxPowerConfig_t::rampTime values
*/
#define RAIL_MINIMUM_TRANSITION_US (100U)
/**
* @def RAIL_MAXIMUM_TRANSITION_US
* @brief The maximum value for a consistent RAIL transition
*/
#define RAIL_MAXIMUM_TRANSITION_US (1000000U)
/**
* Internal Radio State type mapping for EFR32 chips.
*/
typedef RAIL_RadioStateEfr32_t RAIL_RacRadioState_t;
/** @} */ // end of group State_Transitions_EFR32XG2X
#ifdef __cplusplus
}
#endif
#endif //__RAIL_TYPES_H__
#endif //__RAIL_CHIP_SPECIFIC_H_
#endif //SLI_LIBRARY_BUILD

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/***************************************************************************//**
* @file
* @brief Definition of error codes that occur in RAIL.
* This file is purely informational and optional -
* it need not be included even if rail_assert libraries are included.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_ASSERT_ERROR_CODES_H__
#define __RAIL_ASSERT_ERROR_CODES_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup Assertions
* @{
*/
/**
* Enumeration of all possible error codes from RAIL_ASSERT.
*/
RAIL_ENUM_GENERIC(RAIL_AssertErrorCodes_t, uint32_t)
{
/** Appended info missing from RX packet. */
RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING = 0,
/** Receive FIFO too small for IR calibration. */
RAIL_ASSERT_FAILED_RX_FIFO_BYTES = 1,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_2 = 2,
/** Receive FIFO entry has invalid status. */
RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS = 3,
/** Receive FIFO entry bad packet length. */
RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH = 4,
/** Unable to configure radio for IR calibration. */
RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR = 5,
/** Reached unexpected state while handling RX FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO = 6,
/** Reached unexpected state while handling RXLEN FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO = 7,
/** Reached unexpected state while handling TX FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO = 8,
/** Reached unexpected state while handling TX ACK FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO = 9,
/** Invalid memory region accessed. */
RAIL_ASSERT_INVALID_MEMORY_ACCESS = 10,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_11 = 11,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_12 = 12,
/** Error synchronizing the RAIL timebase after sleep. */
RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP = 13,
/** VCO frequency outside supported range. */
RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY = 14,
/** Radio active while changing channels. */
RAIL_ASSERT_FAILED_RAC_STATE = 15,
/** Invalid Synth VCOCTRL field calculation. */
RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL = 16,
/** Nested attempt to lock the sequencer. */
RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK = 17,
/** RSSI averaging enabled without a valid callback. */
RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE = 18,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_19 = 19,
/** Unable to seed radio pseudo random number generator. */
RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED = 20,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_21 = 21,
/** Invalid timer channel specified. */
RAIL_ASSERT_FAILED_PROTIMER_CHANNEL = 22,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_23 = 23,
/** LBT config exceeds register size. */
RAIL_ASSERT_FAILED_BASECNTTOP = 24,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_25 = 25,
/** Could not synchronize RAIL timebase with the RTC. */
RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED = 26,
/** Clock source not ready. */
RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY = 27,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_28 = 28,
/** NULL was supplied as a RAIL_Handle_t argument. */
RAIL_ASSERT_NULL_HANDLE = 29,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_30 = 30,
/** API improperly called while protocol inactive. */
RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG = 31,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_32 = 32,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_33 = 33,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_34 = 34,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_35 = 35,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_36 = 36,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_37 = 37,
/** Failed to enable synth for transmit. */
RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE = 38,
/** This function is deprecated and must not be called. */
RAIL_ASSERT_DEPRECATED_FUNCTION = 39,
/** Multiprotocol task started with no event to run. */
RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT = 40,
/** Invalid interrupt enabled. */
RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED = 41,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_42 = 42,
/** Division by zero. */
RAIL_ASSERT_DIVISION_BY_ZERO = 43,
/** Function cannot be called without access to the hardware. */
RAIL_ASSERT_CANT_USE_HARDWARE = 44,
/** Pointer parameter was passed as NULL. */
RAIL_ASSERT_NULL_PARAMETER = 45,
/** Secure Element fault */
RAIL_ASSERT_SECURE_ELEMENT_FAULT = 46,
/** Synth radio config buffer for channel hopping too small. */
RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER = 47,
/** Buffer provided for RX Channel Hopping is too small. */
RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT = 48,
/** Invalid action was attempted on a module. */
RAIL_ASSERT_INVALID_MODULE_ACTION = 49,
/** The radio config for this channel is not compatible with channel hopping. */
RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG = 50,
/** Channel change failed. */
RAIL_ASSERT_CHANNEL_CHANGE_FAILED = 51,
/** Attempted to read invalid register. */
RAIL_ASSERT_INVALID_REGISTER = 52,
/** CP/DMA Invalid error. */
RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR = 53,
/** DMP radio config caching failed. */
RAIL_ASSERT_CACHE_CONFIG_FAILED = 54,
/** NULL was supplied as a RAIL_StateTransitions_t argument. */
RAIL_ASSERT_NULL_TRANSITIONS = 55,
/** LDMA transfer failed. */
RAIL_ASSERT_BAD_LDMA_TRANSFER = 56,
/** Attempted to wake up with invalid RTCC sync data. */
RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES = 57,
/** Radio sequencer hit a fault condition. */
RAIL_ASSERT_SEQUENCER_FAULT = 58,
/** Bus fault. */
RAIL_ASSERT_BUS_ERROR = 59,
/** The current radio config cannot be used with packet filtering. */
RAIL_ASSERT_INVALID_FILTERING_CONFIG = 60,
/** Retiming configuration error. */
RAIL_ASSERT_RETIMING_CONFIG = 61,
/** TX CRC configuration is corrupt. */
RAIL_ASSERT_FAILED_TX_CRC_CONFIG = 62,
/** The current PA config does not allow for this operation. */
RAIL_ASSERT_INVALID_PA_OPERATION = 63,
/** The sequencer selected an invalid PA. */
RAIL_ASSERT_SEQ_INVALID_PA_SELECTED = 64,
/** Invalid/unsupported channel config. */
RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG = 65,
/** Radio Calculator configuration HFXO frequency mismatch with chip */
RAIL_ASSERT_INVALID_XTAL_FREQUENCY = 66,
/** Internal error. */
RAIL_ASSERT_INTERNAL_GENERIC_ERROR = 67,
/** Software modem image does not support requested modulation */
RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION = 68,
/** Failed to disable RTCC synchronization. */
RAIL_ASSERT_FAILED_RTCC_SYNC_STOP = 69,
/** Multitimer linked list corrupted. */
RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT = 70,
/** Unable to configure radio for temperature calibration. */
RAIL_ASSERT_FAILED_TEMPCAL_ERROR = 71,
/** Invalid VDET configuration. */
RAIL_ASSERT_INVALID_VDET_CONFIGURATION = 72,
/** Invalid RFFPLL configuration. */
RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION = 73,
/** Secure access fault. */
RAIL_ASSERT_SECURE_ACCESS_FAULT = 74,
/** SYSRTC0 not running. */
RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING = 75,
/** Radio Configurator not updated. */
RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE = 76,
/** Failed to set the event for configurable RSSI threshold. */
RAIL_ASSERT_FAILED_RSSI_THRESHOLD = 77,
/** Intended and actual Z-Wave region configuration mismatch. */
RAIL_ASSERT_INCORRECT_ZWAVE_REGION = 78,
/** Attempted to sleep with stale RTCC synchronization data */
RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA = 79,
/** Attempted to clear LOG2X4 with a DEC1 value not equal to 0 */
RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION = 80,
/** Failed to complete DMA write */
RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE = 81,
/** RAIL does not support this Radio Calculator configuration */
RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED = 82,
/** Invalid binary image was loaded onto the sequencer */
RAIL_ASSERT_INVALID_SEQUENCER_IMAGE = 83,
/** No common or protocol image selected to be loaded onto the sequencer */
RAIL_ASSERT_MISSING_SEQUENCER_IMAGE = 84,
/** Software modem image invalid or missing */
RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE = 85,
/** The sequencer user generated error. */
RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR = 86,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING)
#define RAIL_ASSERT_FAILED_RX_FIFO_BYTES ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RX_FIFO_BYTES)
#define RAIL_ASSERT_UNUSED_2 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_2)
#define RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS)
#define RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH)
#define RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO)
#define RAIL_ASSERT_INVALID_MEMORY_ACCESS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_MEMORY_ACCESS)
#define RAIL_ASSERT_UNUSED_11 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_11)
#define RAIL_ASSERT_UNUSED_12 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_12)
#define RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP)
#define RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY)
#define RAIL_ASSERT_FAILED_RAC_STATE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RAC_STATE)
#define RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL)
#define RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK)
#define RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE)
#define RAIL_ASSERT_UNUSED_19 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_19)
#define RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED)
#define RAIL_ASSERT_UNUSED_21 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_21)
#define RAIL_ASSERT_FAILED_PROTIMER_CHANNEL ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_PROTIMER_CHANNEL)
#define RAIL_ASSERT_UNUSED_23 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_23)
#define RAIL_ASSERT_FAILED_BASECNTTOP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_BASECNTTOP)
#define RAIL_ASSERT_UNUSED_25 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_25)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED)
#define RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY)
#define RAIL_ASSERT_UNUSED_28 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_28)
#define RAIL_ASSERT_NULL_HANDLE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_HANDLE)
#define RAIL_ASSERT_UNUSED_30 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_30)
#define RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG)
#define RAIL_ASSERT_UNUSED_32 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_32)
#define RAIL_ASSERT_UNUSED_33 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_33)
#define RAIL_ASSERT_UNUSED_34 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_34)
#define RAIL_ASSERT_UNUSED_35 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_35)
#define RAIL_ASSERT_UNUSED_36 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_36)
#define RAIL_ASSERT_UNUSED_37 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_37)
#define RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE)
#define RAIL_ASSERT_DEPRECATED_FUNCTION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_DEPRECATED_FUNCTION)
#define RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT)
#define RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED)
#define RAIL_ASSERT_UNUSED_42 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_42)
#define RAIL_ASSERT_DIVISION_BY_ZERO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_DIVISION_BY_ZERO)
#define RAIL_ASSERT_CANT_USE_HARDWARE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CANT_USE_HARDWARE)
#define RAIL_ASSERT_NULL_PARAMETER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_PARAMETER)
#define RAIL_ASSERT_SECURE_ELEMENT_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SECURE_ELEMENT_FAULT)
#define RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER)
#define RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT)
#define RAIL_ASSERT_INVALID_MODULE_ACTION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_MODULE_ACTION)
#define RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG)
#define RAIL_ASSERT_CHANNEL_CHANGE_FAILED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_CHANGE_FAILED)
#define RAIL_ASSERT_INVALID_REGISTER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_REGISTER)
#define RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR)
#define RAIL_ASSERT_CACHE_CONFIG_FAILED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CACHE_CONFIG_FAILED)
#define RAIL_ASSERT_NULL_TRANSITIONS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_TRANSITIONS)
#define RAIL_ASSERT_BAD_LDMA_TRANSFER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_BAD_LDMA_TRANSFER)
#define RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES)
#define RAIL_ASSERT_SEQUENCER_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQUENCER_FAULT)
#define RAIL_ASSERT_BUS_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_BUS_ERROR)
#define RAIL_ASSERT_INVALID_FILTERING_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_FILTERING_CONFIG)
#define RAIL_ASSERT_RETIMING_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_RETIMING_CONFIG)
#define RAIL_ASSERT_FAILED_TX_CRC_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TX_CRC_CONFIG)
#define RAIL_ASSERT_INVALID_PA_OPERATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_PA_OPERATION)
#define RAIL_ASSERT_SEQ_INVALID_PA_SELECTED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQ_INVALID_PA_SELECTED)
#define RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG)
#define RAIL_ASSERT_INVALID_XTAL_FREQUENCY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_XTAL_FREQUENCY)
#define RAIL_ASSERT_INTERNAL_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INTERNAL_GENERIC_ERROR)
#define RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_STOP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_STOP)
#define RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT)
#define RAIL_ASSERT_FAILED_TEMPCAL_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TEMPCAL_ERROR)
#define RAIL_ASSERT_INVALID_VDET_CONFIGURATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_VDET_CONFIGURATION)
#define RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION)
#define RAIL_ASSERT_SECURE_ACCESS_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SECURE_ACCESS_FAULT)
#define RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING)
#define RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE)
#define RAIL_ASSERT_FAILED_RSSI_THRESHOLD ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RSSI_THRESHOLD)
#define RAIL_ASSERT_INCORRECT_ZWAVE_REGION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INCORRECT_ZWAVE_REGION)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA)
#define RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION)
#define RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE)
#define RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED)
#define RAIL_ASSERT_INVALID_SEQUENCER_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_SEQUENCER_IMAGE)
#define RAIL_ASSERT_MISSING_SEQUENCER_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_MISSING_SEQUENCER_IMAGE)
#define RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE)
#define RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR)
#endif//DOXYGEN_SHOULD_SKIP_THIS
/// Use this define to create an array of error messages that map to the codes
/// in \ref RAIL_AssertErrorCodes_t. You can use these to print slightly more
/// detailed error strings related to a particular assert error code if desired.
/// For example, you could implement your assert failed callback as follows to
/// make use of this.
/// @code{.c}
/// void RAILCb_AssertFailed(RAIL_Handle_t railHandle, RAIL_AssertErrorCodes_t errorCode)
/// {
/// static const char* railErrorMessages[] = RAIL_ASSERT_ERROR_MESSAGES;
/// const char *errorMessage = "Unknown";
///
/// // If this error code is within the range of known error messages then use
/// // the appropriate error message.
/// if (errorCode < (sizeof(railErrorMessages) / sizeof(char*))) {
/// errorMessage = railErrorMessages[errorCode];
/// }
/// printf("RAIL ASSERT %u: %s\n", errorCode, errorMessage);
///
/// // Reset the chip since an assert is a fatal error
/// NVIC_SystemReset();
/// }
/// @endcode
///
#define RAIL_ASSERT_ERROR_MESSAGES { \
/* 0*/ "Appended info missing from RX packet", \
/* 1*/ "Receive FIFO too small for IR calibration", \
/* 2*/ "Invalid assert, no longer used", \
/* 3*/ "Receive FIFO entry has invalid status", \
/* 4*/ "Receive FIFO entry bad packet length", \
/* 5*/ "Unable to configure radio for IR calibration", \
/* 6*/ "Reached unexpected state while handling RX FIFO events", \
/* 7*/ "Reached unexpected state while handling RXLEN FIFO events", \
/* 8*/ "Reached unexpected state while handling TX FIFO events", \
/* 9*/ "Reached unexpected state while handling TX ACK FIFO events", \
/*10*/ "Invalid memory region accessed", \
/*11*/ "Invalid assert, no longer used", \
/*12*/ "Invalid assert, no longer used", \
/*13*/ "Error synchronizing the RAIL timebase after sleep", \
/*14*/ "VCO frequency outside supported range", \
/*15*/ "Radio active while changing channels", \
/*16*/ "Invalid Synth VCOCTRL field calculation", \
/*17*/ "Nested attempt to lock the sequencer", \
/*18*/ "RSSI averaging enabled without a valid callback", \
/*19*/ "Invalid assert, no longer used", \
/*20*/ "Unable to seed radio pseudo random number generator", \
/*21*/ "Invalid assert, no longer used", \
/*22*/ "Invalid timer channel specified", \
/*23*/ "Invalid assert, no longer used", \
/*24*/ "LBT config exceeds register size", \
/*25*/ "Invalid assert, no longer used", \
/*26*/ "Could not synchronize RAIL timebase with the RTC", \
/*27*/ "Clock source not ready", \
/*28*/ "Invalid assert, no longer used", \
/*29*/ "NULL was supplied as a RAIL_Handle_t argument", \
/*30*/ "Invalid assert, no longer used", \
/*31*/ "API improperly called while protocol inactive", \
/*32*/ "Invalid assert, no longer used", \
/*33*/ "Invalid assert, no longer used", \
/*34*/ "Invalid assert, no longer used", \
/*35*/ "Invalid assert, no longer used", \
/*36*/ "Invalid assert, no longer used", \
/*37*/ "Invalid assert, no longer used", \
/*38*/ "Failed to enable synth for transmit.", \
/*39*/ "This function is deprecated and must not be called", \
/*40*/ "Multiprotocol task started with no event to run", \
/*41*/ "Invalid interrupt enabled", \
/*42*/ "Invalid assert, no longer used", \
/*43*/ "Division by zero", \
/*44*/ "Function cannot be called without access to the hardware", \
/*45*/ "Pointer parameter was passed as NULL", \
/*46*/ "Secure Element fault", \
/*47*/ "Synth radio config buffer for channel hopping too small", \
/*48*/ "Buffer provided for RX Channel Hopping is too small", \
/*49*/ "Invalid action was attempted on a module", \
/*50*/ "The radio config for this channel is not compatible with channel hopping", \
/*51*/ "Channel change failed", \
/*52*/ "Attempted to read invalid register", \
/*53*/ "CP/DMA Generic internal error", \
/*54*/ "DMP radio config caching failed", \
/*55*/ "NULL was supplied as a RAIL_StateTransitions_t argument", \
/*56*/ "LDMA transfer failed", \
/*57*/ "Attempted to wake up with invalid RTCC sync data", \
/*58*/ "Radio sequencer hit a fault condition", \
/*59*/ "Bus fault", \
/*60*/ "The current radio config cannot be used with packet filtering", \
/*61*/ "Retiming configuration error", \
/*62*/ "TX CRC configuration is corrupt", \
/*63*/ "The current PA config does not allow for this operation", \
/*64*/ "The sequencer selected an invalid PA", \
/*65*/ "Invalid/unsupported channel config", \
/*66*/ "Radio Calculator configuration HFXO frequency mismatch with chip", \
/*67*/ "Generic internal error", \
/*68*/ "Software modem image does not support requested modulation", \
/*69*/ "Failed to disable RTCC synchronization", \
/*70*/ "Multitimer linked list corrupted", \
/*71*/ "Unable to configure radio for temperature calibration", \
/*72*/ "Invalid VDET configuration", \
/*73*/ "PHY and System RFFPLL settings do not match", \
/*74*/ "Secure access fault", \
/*75*/ "SYSRTC0 not running", \
/*76*/ "Radio Configurator not updated", \
/*77*/ "Failed to set the event for configurable RSSI threshold", \
/*78*/ "Intended and actual Z-Wave region configuration mismatch", \
/*79*/ "Attempted to sleep with stale RTCC synchronization data", \
/*80*/ "Attempted to clear LOG2X4 with a DEC1 value not equal to 0", \
/*81*/ "Failed to complete DMA write", \
/*82*/ "RAIL does not support this Radio Calculator configuration", \
/*83*/ "Invalid binary image loaded on sequencer", \
/*84*/ "No common or protocol image selected to be loaded onto the sequencer", \
/*85*/ "Software modem image invalid or missing", \
/*86*/ "The sequencer user generated error", \
}
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Undocumented RAIL 2.x internal symbol renaming
#define RAIL_AssertErrorCode sli_rail_assert_error_code
#define RAIL_AssertLineNumber sli_rail_assert_line_number
#define RAIL_AssertRailHandle sli_rail_assert_rail_handle
#endif//DOXYGEN_SHOULD_SKIP_THIS
/** @} */ // end of Assertions
#ifdef __cplusplus
}
#endif
#endif // __RAIL_ASSERT_ERROR_CODES_H__

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Libs/platform/radio/rail_lib/common/rail_features.h Normal file
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@@ -0,0 +1,952 @@
/***************************************************************************//**
* @file
* @brief Auxiliary header for the RAIL library. Includes consistent definitions
* of features available across different chips.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_FEATURES_H__
#define __RAIL_FEATURES_H__
#include "em_device.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup RAIL_API
* @{
*/
/******************************************************************************
* RAIL Features
*****************************************************************************/
/**
* @addtogroup Features
* @brief Overview of support for various features across hardware platforms.
* These defines can be used at compile time to determine which
* features are available on your platform. However, keep in mind that
* these defines hold true for chip families. Your specific part
* may have further restrictions (band limitations, power amplifier
* restrictions, and so on) on top of those listed below, for which
* runtime RAIL_*Supports*() APIs can be used to check availability
* on a particular chip (after \ref RAIL_Init() has been called).
* In general, an attempt to call an API that is not supported on your
* chip family as listed below will result in a
* \ref RAIL_STATUS_INVALID_CALL.
* @{
*/
/// Boolean to indicate whether the selected chip supports both Sub-GHz and 2.4 GHz bands.
/// See also runtime refinement \ref RAIL_SupportsDualBand().
#if ((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| ((FEAT_RF_2G4 == 1) && (FEAT_RF_SUBG == 1)))
#define RAIL_SUPPORTS_DUAL_BAND 1
#else
#define RAIL_SUPPORTS_DUAL_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_DUAL_BAND.
#define RAIL_FEAT_DUAL_BAND_RADIO RAIL_SUPPORTS_DUAL_BAND
/// Boolean to indicate whether the selected chip supports the 2.4 GHz band.
/// See also runtime refinement \ref RAIL_Supports2p4GHzBand().
#if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_2G4HZ)) \
|| (FEAT_RF_2G4 == 1))
#define RAIL_SUPPORTS_2P4GHZ_BAND 1
#else
#define RAIL_SUPPORTS_2P4GHZ_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_2P4GHZ_BAND.
#define RAIL_FEAT_2G4_RADIO RAIL_SUPPORTS_2P4GHZ_BAND
/// Boolean to indicate whether the selected chip supports Sub-GHz bands.
/// See also runtime refinement \ref RAIL_SupportsSubGHzBand().
#if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_SUBGHZ)) \
|| (FEAT_RF_SUBG == 1))
#define RAIL_SUPPORTS_SUBGHZ_BAND 1
#else
#define RAIL_SUPPORTS_SUBGHZ_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_SUBGHZ_BAND.
#define RAIL_FEAT_SUBGIG_RADIO RAIL_SUPPORTS_SUBGHZ_BAND
/// Boolean to indicate whether the selected chip supports OFDM PA.
/// See also runtime refinement \ref RAIL_SupportsOFDMPA().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_OFDM_PA 1
#else
#define RAIL_SUPPORTS_OFDM_PA 0
#endif
/// Boolean to indicate whether the selected chip supports
/// bit masked address filtering.
/// See also runtime refinement \ref RAIL_SupportsAddrFilterAddressBitMask().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
#define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 1
#else
#define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 0
#endif
/// Boolean to indicate whether the selected chip supports
/// address filter mask information for incoming packets in
/// \ref RAIL_RxPacketInfo_t::filterMask and
/// \ref RAIL_IEEE802154_Address_t::filterMask.
/// See also runtime refinement \ref RAIL_SupportsAddrFilterMask().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_SUPPORTS_ADDR_FILTER_MASK 1
#else
#define RAIL_SUPPORTS_ADDR_FILTER_MASK 0
#endif
/// Boolean to indicate whether the selected chip supports
/// alternate power settings for the Power Amplifier.
/// See also runtime refinement \ref RAIL_SupportsAlternateTxPower().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG > 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_ALTERNATE_TX_POWER 1
#else
#define RAIL_SUPPORTS_ALTERNATE_TX_POWER 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ALTERNATE_TX_POWER.
#define RAIL_FEAT_ALTERNATE_POWER_TX_SUPPORTED RAIL_SUPPORTS_ALTERNATE_TX_POWER
/// Boolean to indicate whether the selected chip supports antenna diversity.
/// See also runtime refinement \ref RAIL_SupportsAntennaDiversity().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES == 2))
#define RAIL_SUPPORTS_ANTENNA_DIVERSITY 1
#else
#define RAIL_SUPPORTS_ANTENNA_DIVERSITY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ANTENNA_DIVERSITY.
#define RAIL_FEAT_ANTENNA_DIVERSITY RAIL_SUPPORTS_ANTENNA_DIVERSITY
/// Boolean to indicate whether the selected chip supports internal RF path diversity.
/// See also runtime refinement \ref RAIL_SupportsPathDiversity().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PATH_DIVERSITY 1
#else
#define RAIL_SUPPORTS_PATH_DIVERSITY 0
#endif
/// Boolean to indicate whether the selected chip supports channel hopping.
/// See also runtime refinement \ref RAIL_SupportsChannelHopping().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG >= 1) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_SUPPORTS_CHANNEL_HOPPING 1
#else
#define RAIL_SUPPORTS_CHANNEL_HOPPING 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_CHANNEL_HOPPING.
#define RAIL_FEAT_CHANNEL_HOPPING RAIL_SUPPORTS_CHANNEL_HOPPING
/// Boolean to indicate whether the selected chip supports dual sync words.
/// See also runtime refinement \ref RAIL_SupportsDualSyncWords().
#if 1
#define RAIL_SUPPORTS_DUAL_SYNC_WORDS 1
#else
#define RAIL_SUPPORTS_DUAL_SYNC_WORDS 0
#endif
/// Boolean to indicate whether the selected chip supports automatic transitions
/// from TX to TX.
/// See also runtime refinement \ref RAIL_SupportsTxToTx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_SUPPORTS_TX_TO_TX 1
#else
#define RAIL_SUPPORTS_TX_TO_TX 0
#endif
/// Boolean to indicate whether the selected chip supports \ref RAIL_TX_REPEAT_OPTION_START_TO_START.
/// See also runtime refinement \ref RAIL_SupportsTxRepeatStartToStart().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
#define RAIL_SUPPORTS_TX_REPEAT_START_TO_START RAIL_SUPPORTS_TX_TO_TX
#else
#define RAIL_SUPPORTS_TX_REPEAT_START_TO_START 0
#endif
/// Boolean to indicate whether the selected chip supports thermistor measurements.
/// See also runtime refinement \ref RAIL_SupportsExternalThermistor().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 1
#else
#define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_EXTERNAL_THERMISTOR.
#define RAIL_FEAT_EXTERNAL_THERMISTOR RAIL_SUPPORTS_EXTERNAL_THERMISTOR
/// Boolean to indicate whether the selected chip supports HFXO compensation.
/// See also runtime refinement \ref RAIL_SupportsHFXOCompensation().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_HFXO_COMPENSATION RAIL_SUPPORTS_EXTERNAL_THERMISTOR
#else
#define RAIL_SUPPORTS_HFXO_COMPENSATION 0
#endif
/// Boolean to indicate whether the selected chip supports AUXADC measurements.
/// See also runtime refinement \ref RAIL_SupportsAuxAdc().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_AUXADC 1
#else
#define RAIL_SUPPORTS_AUXADC 0
#endif
/// Boolean to indicate whether the selected chip supports a high-precision
/// LFRCO.
/// Best to use the runtime refinement \ref RAIL_SupportsPrecisionLFRCO()
/// because some chip revisions do not support it.
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_PRECISION_LFRCO 1
#else
#define RAIL_SUPPORTS_PRECISION_LFRCO 0
#endif
/// Boolean to indicate whether the selected chip supports radio entropy.
/// See also runtime refinement \ref RAIL_SupportsRadioEntropy().
#ifndef FPGA
#define RAIL_SUPPORTS_RADIO_ENTROPY 1
#else
#define RAIL_SUPPORTS_RADIO_ENTROPY 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RFSENSE Energy Detection Mode.
/// See also runtime refinement \ref RAIL_SupportsRfSenseEnergyDetection().
#if ((_SILICON_LABS_32B_SERIES == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 1
#else
#define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RFSENSE Selective(OOK) Mode.
/// See also runtime refinement \ref RAIL_SupportsRfSenseSelectiveOok().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 1
#else
#define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK.
#define RAIL_FEAT_RFSENSE_SELECTIVE_OOK_MODE_SUPPORTED \
RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK
/// Boolean to indicate whether the selected chip supports the
/// VDET voltage measurement feature.
/// See also runtime refinement \ref RAIL_SupportsVdet().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_VDET 1
#else
#define RAIL_SUPPORTS_VDET 0
#endif
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports the User Sequencer
/// See also runtime refinement \ref RAIL_SupportsUserSequencer().
#if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)
#define RAIL_SUPPORTS_USER_SEQUENCER 1
#else
#define RAIL_SUPPORTS_USER_SEQUENCER 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
// BLE features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports BLE.
/// See also runtime refinement \ref RAIL_SupportsProtocolBLE().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 4)
#define RAIL_SUPPORTS_PROTOCOL_BLE RAIL_SUPPORTS_2P4GHZ_BAND
#else
#define RAIL_SUPPORTS_PROTOCOL_BLE 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps
/// Non-Viterbi PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports1MbpsNonViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 1)
#define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps Viterbi
/// PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports1MbpsViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_1MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_1MBPS_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps operation.
/// See also runtime refinement \ref RAIL_BLE_Supports1Mbps().
#define RAIL_BLE_SUPPORTS_1MBPS \
(RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_1MBPS_VITERBI)
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps
/// Non-Viterbi PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports2MbpsNonViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 2)
#define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps Viterbi
/// PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports2MbpsViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_2MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_2MBPS_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps operation.
/// See also runtime refinement \ref RAIL_BLE_Supports2Mbps().
#define RAIL_BLE_SUPPORTS_2MBPS \
(RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_2MBPS_VITERBI)
/// Boolean to indicate whether the selected chip supports BLE
/// Antenna Switching needed for Angle-of-Arrival receives or
/// Angle-of-Departure transmits.
/// See also runtime refinement \ref RAIL_BLE_SupportsAntennaSwitching().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING 0
#endif
/// Boolean to indicate whether the selected chip supports the BLE Coded PHY
/// used for Long-Range.
/// See also runtime refinement \ref RAIL_BLE_SupportsCodedPhy().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_CODED_PHY RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CODED_PHY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_CODED_PHY.
#define RAIL_FEAT_BLE_CODED RAIL_BLE_SUPPORTS_CODED_PHY
/// Boolean to indicate whether the selected chip supports the BLE Simulscan PHY
/// used for simultaneous BLE 1 Mbps and Coded PHY reception.
/// See also runtime refinement \ref RAIL_BLE_SupportsSimulscanPhy().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports BLE
/// CTE (Constant Tone Extension) needed for Angle-of-Arrival/Departure
/// transmits.
/// See also runtime refinement \ref RAIL_BLE_SupportsCte().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_CTE RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CTE 0
#endif
/// Boolean to indicate whether the selected chip supports the
/// Quuppa PHY.
/// See also runtime refinement \ref RAIL_BLE_SupportsQuuppa().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_BLE_SUPPORTS_QUUPPA RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_QUUPPA 0
#endif
/// Boolean to indicate whether the selected chip supports BLE
/// IQ Sampling needed for Angle-of-Arrival/Departure receives.
/// See also runtime refinement \ref RAIL_BLE_SupportsIQSampling().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_IQ_SAMPLING RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_IQ_SAMPLING 0
#endif
/// Boolean to indicate whether the selected chip supports some BLE AOX
/// features.
#define RAIL_BLE_SUPPORTS_AOX \
(RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING \
|| RAIL_BLE_SUPPORTS_IQ_SAMPLING \
|| RAIL_BLE_SUPPORTS_CTE)
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_AOX
#define RAIL_FEAT_BLE_AOX_SUPPORTED RAIL_BLE_SUPPORTS_AOX
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports BLE
/// CS (Channel Sounding).
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 4)
#define RAIL_BLE_SUPPORTS_CS RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CS 0
#endif
#endif//DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports BLE PHY switch to RX
/// functionality, which is used to switch BLE PHYs at a specific time
/// to receive auxiliary packets.
/// See also runtime refinement \ref RAIL_BLE_SupportsPhySwitchToRx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX 0
#endif
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX.
#define RAIL_FEAT_BLE_PHY_SWITCH_TO_RX RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX
// IEEE 802.15.4 features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports IEEE 802.15.4.
/// See also runtime refinement \ref RAIL_SupportsProtocolIEEE802154().
#if 1
#define RAIL_SUPPORTS_PROTOCOL_IEEE802154 1
#else
#define RAIL_SUPPORTS_PROTOCOL_IEEE802154 0
#endif
/// Boolean to indicate whether the selected chip supports the
/// 802.15.4 Wi-Fi Coexistence PHY.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsCoexPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG > 1)
#define RAIL_IEEE802154_SUPPORTS_COEX_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_COEX_PHY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_COEX_PHY.
#define RAIL_FEAT_802154_COEX_PHY RAIL_IEEE802154_SUPPORTS_COEX_PHY
/// Boolean to indicate whether the selected chip supports
/// the IEEE 802.15.4 2.4 GHz band variant.
/// See also runtime refinement \ref RAIL_SupportsIEEE802154Band2P4().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3)
#define RAIL_SUPPORTS_IEEE802154_BAND_2P4 (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_SUPPORTS_IEEE802154_BAND_2P4 0
#endif
/// Boolean to indicate whether the selected chip supports
/// the IEEE 802.15.4 2.4 RX channel switching.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsRxChannelSwitching().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
#define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING (RAIL_SUPPORTS_IEEE802154_BAND_2P4)
#else
#define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING 0
#endif
/// Boolean to indicate whether the selected chip supports a front end module.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsFemPhy().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 8)
#define RAIL_IEEE802154_SUPPORTS_FEM_PHY (RAIL_SUPPORTS_IEEE802154_BAND_2P4)
#else
#define RAIL_IEEE802154_SUPPORTS_FEM_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4E-2012 feature subset needed for Zigbee R22 GB868.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsESubsetGB868().
#if 1
#define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868.
#define RAIL_FEAT_IEEE802154_E_GB868_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4E-2012 Enhanced ACKing.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEEnhancedAck().
#if 1
#define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK.
#define RAIL_FEAT_IEEE802154_E_ENH_ACK_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK
/// Boolean to indicate whether the selected chip supports
/// receiving IEEE 802.15.4E-2012 Multipurpose frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEMultipurposeFrames().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES.
#define RAIL_FEAT_IEEE802154_MULTIPURPOSE_FRAME_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 feature subset needed for Zigbee R22 GB868.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGSubsetGB868().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3)
#define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 \
((RAIL_SUPPORTS_PROTOCOL_IEEE802154 != 0) && (RAIL_SUPPORTS_SUBGHZ_BAND != 0))
#else
#define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868.
#define RAIL_FEAT_IEEE802154_G_GB868_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
/// Boolean to indicate whether the selected chip supports
/// dynamic FEC
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGDynFec().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG > 1) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_IEEE802154_SUPPORTS_G_DYNFEC \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now
#else
#define RAIL_IEEE802154_SUPPORTS_G_DYNFEC 0
#endif
/// Boolean to indicate whether the selected chip supports
/// Wi-SUN mode switching
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGModeSwitch().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now
#else
#define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH 0
#endif
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 reception and transmission of frames
/// with 4-byte CRC.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsG4ByteCrc().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC 0
#endif
/// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC.
#define RAIL_FEAT_IEEE802154_G_4BYTE_CRC_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 reception of unwhitened frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGUnwhitenedRx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX.
#define RAIL_FEAT_IEEE802154_G_UNWHITENED_RX_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 transmission of unwhitened frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGUnwhitenedTx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX.
#define RAIL_FEAT_IEEE802154_G_UNWHITENED_TX_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX
/// Boolean to indicate whether the selected chip supports
/// canceling the frame-pending lookup event
/// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND
/// when the radio transitions to a state that renders the
/// the reporting of this event moot (i.e., too late for
/// the stack to influence the outgoing ACK).
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsCancelFramePendingLookup().
#if 1
#define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP.
#define RAIL_FEAT_IEEE802154_CANCEL_FP_LOOKUP_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP
/// Boolean to indicate whether the selected chip supports
/// early triggering of the frame-pending lookup event
/// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND
/// just after MAC address fields have been received.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEarlyFramePendingLookup().
#if 1
#define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP.
#define RAIL_FEAT_IEEE802154_EARLY_FP_LOOKUP_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP
/// Boolean to indicate whether the selected chip supports dual PA configs for mode switch
/// or concurrent mode.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsDualPaConfig().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 1
#else
#define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 0
#endif
/// Boolean to indicate whether the selected chip supports the pa power setting table.
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 1
#else
#define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 0
#endif
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip uses the common PA interface.
/// This feature is available when the configuration for Silicon Labs Series 3
/// devices is set to 1, enabling the use of a unified Power Amplifier (PA) interface
/// across different configurations.
#if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)
#define RAIL_SUPPORTS_COMMON_PA_INTERFACE 1
#else
#define RAIL_SUPPORTS_COMMON_PA_INTERFACE 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports
/// IEEE802.15.4 2.4 GHz at 2 Mbps
/// See also runtime refinement \ref
/// RAIL_IEEE802154_Supports2MbpsPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300)
#define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY \
(RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports IEEE 802.15.4 PHY
/// with custom settings
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_1_CONFIG == 3))
#define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY 0
#endif
// Wi_SUN features
/// Boolean to indicate whether the selected chip supports
/// Wi-SUN
/// See also runtime refinement \ref
/// RAIL_SupportsProtocolWiSUN().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_WI_SUN 1
#else
#define RAIL_SUPPORTS_PROTOCOL_WI_SUN 0
#endif
// WMBUS features
/// Boolean to indicate whether the selected chip supports WMBUS simultaneous
/// M2O RX of T and C modes set by \ref RAIL_WMBUS_Config().
/// See also runtime refinement \ref RAIL_WMBUS_SupportsSimultaneousTCRx().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 1
#else
#define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 0
#endif
// Z-Wave features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports Z-Wave.
/// See also runtime refinement \ref RAIL_SupportsProtocolZWave().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_ZWAVE RAIL_SUPPORTS_SUBGHZ_BAND
#else
#define RAIL_SUPPORTS_PROTOCOL_ZWAVE 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_PROTOCOL_ZWAVE.
#define RAIL_FEAT_ZWAVE_SUPPORTED RAIL_SUPPORTS_PROTOCOL_ZWAVE
/// Boolean to indicate whether the selected chip supports energy detect PHY.
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsEnergyDetectPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 3)
#define RAIL_ZWAVE_SUPPORTS_ED_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_ED_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports concurrent PHY.
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsConcPhy().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_ZWAVE_SUPPORTS_CONC_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_CONC_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports SQ-based PHY.
/// See also runtime refinement \ref RAIL_SupportsSQPhy().
#if (((_SILICON_LABS_32B_SERIES_2_CONFIG >= 3) \
&& (_SILICON_LABS_32B_SERIES_2_CONFIG != 7) \
&& (_SILICON_LABS_32B_SERIES_2_CONFIG != 9)) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
#define RAIL_SUPPORTS_SQ_PHY 1
#else
#define RAIL_SUPPORTS_SQ_PHY 0
#endif
/// Boolean to indicate whether the code supports Z-Wave
/// region information in PTI and
/// newer \ref RAIL_ZWAVE_RegionConfig_t structure
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsRegionPti().
#if 1
#define RAIL_ZWAVE_SUPPORTS_REGION_PTI RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_REGION_PTI 0
#endif
/// Backwards-compatible synonym of \ref RAIL_ZWAVE_SUPPORTS_REGION_PTI.
#define RAIL_FEAT_ZWAVE_REGION_PTI RAIL_ZWAVE_SUPPORTS_REGION_PTI
/// Boolean to indicate whether the selected chip supports raw RX data
/// sources other than \ref RAIL_RxDataSource_t::RX_PACKET_DATA.
/// See also runtime refinement \ref RAIL_SupportsRxRawData().
#if (_SILICON_LABS_32B_SERIES_3_CONFIG == 0)
#define RAIL_SUPPORTS_RX_RAW_DATA 1
#else
#define RAIL_SUPPORTS_RX_RAW_DATA 0
#endif
/// Boolean to indicate whether the selected chip supports
/// direct mode.
/// See also runtime refinement \ref RAIL_SupportsDirectMode().
#if ((_SILICON_LABS_32B_SERIES == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_DIRECT_MODE 1
#else
#define RAIL_SUPPORTS_DIRECT_MODE 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RX direct mode data to FIFO.
/// See also runtime refinement \ref RAIL_SupportsRxDirectModeDataToFifo().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 1
#else
#define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 0
#endif
/// Boolean to indicate whether the selected chip supports
/// MFM protocol.
/// See also runtime refinement \ref RAIL_SupportsMfm().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_MFM 1
#else
#define RAIL_SUPPORTS_MFM 0
#endif
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
/// Boolean to indicate whether the selected chip supports
/// 802.15.4 signal detection
#define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_IEEE802154)
/// Boolean to indicate whether the selected chip supports
/// BLE signal detection
#define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_BLE)
#else
/// Boolean to indicate whether the selected chip supports
/// 802.15.4 signal detection
#define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER 0
/// Boolean to indicate whether the selected chip supports
/// BLE signal detection
#define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER 0
#endif
/// Boolean to indicate whether the selected chip supports
/// configurable RSSI threshold set by \ref RAIL_SetRssiDetectThreshold().
/// See also runtime refinement \ref RAIL_SupportsRssiDetectThreshold().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5))
#define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (1U)
#else
#define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (0U)
#endif
/// Boolean to indicate whether the selected chip supports
/// thermal protection set by \ref RAIL_ConfigThermalProtection().
/// See also runtime refinement \ref RAIL_SupportsThermalProtection().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_THERMAL_PROTECTION (1U)
#else
#define RAIL_SUPPORTS_THERMAL_PROTECTION (0U)
#endif
/// Boolean to indicate whether the selected chip supports fast RX-to-RX enabled by
/// \ref RAIL_RX_OPTION_FAST_RX2RX.
/// See also runtime refinement \ref RAIL_SupportsFastRx2Rx().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
#define RAIL_SUPPORTS_FAST_RX2RX (1U)
#else
#define RAIL_SUPPORTS_FAST_RX2RX (0U)
#endif
/// Boolean to indicate whether the selected chip supports collision detection
/// enabled by \ref RAIL_RX_OPTION_ENABLE_COLLISION_DETECTION
/// See also runtime refinement \ref RAIL_SupportsCollisionDetection().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_COLLISION_DETECTION (1U)
#else
#define RAIL_SUPPORTS_COLLISION_DETECTION (0U)
#endif
/// Boolean to indicate whether the selected chip supports Sidewalk protocol.
/// See also runtime refinement \ref RAIL_SupportsProtocolSidewalk().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (1U)
#else
#define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (0U)
#endif
/// Boolean to indicate whether the selected chip supports TrustZone secure
/// configuration of peripherals used by RAIL.
/// See also runtime refinement \ref RAIL_SupportsTrustZoneSecurePeripherals().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (1U)
#else
#define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (0U)
#endif
/// Boolean to indicate whether the selected chip supports automatic PRS LNA
/// bypass for external FEM.
/// See also runtime refinement \ref RAIL_SupportsPrsLnaBypass().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_PRS_LNA_BYPASS (1U)
#else
#define RAIL_SUPPORTS_PRS_LNA_BYPASS (0U)
#endif
/** @} */ // end of group Features
/** @} */ // end of group RAIL_API
#ifdef __cplusplus
}
#endif
#endif // __RAIL_FEATURES_H__

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/***************************************************************************//**
* @file
* @brief The MFM specific header file for the RAIL library.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_MFM_H__
#define __RAIL_MFM_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// @addtogroup MFM Multi-Level Frequency Modulation
/// @ingroup Protocol_Specific
/// @brief MFM configuration routines
///
/// @note This feature is only supported on EFR32xG23 devices.
///
/// This feature can be used to directly control the TX interpolation filter
/// input to allow for a more flexible frequency modulation scheme than the
/// standard MODEM. When doing this, the MFM buffer is treated as an array
/// of 8-bit signed data used as normalized frequency deviation to the SYNTH
/// frequency to directly control the interpolation filter input.
/// No support for frame handling, coding, nor shaping is supported.
/// Only compatible with FSK modulations.
///
/// The functions in this group configure RAIL Multi-Level Frequency Modulation (MFM)
/// hardware acceleration features.
///
/// To configure MFM functionality, the application must first set up
/// a RAIL instance with \ref RAIL_Init() and other setup functions.
/// Before enabling MFM, a ping-pong buffer (called buffer0 and buffer1
/// below) must be configured via \ref RAIL_SetMfmPingPongFifo() and
/// populated with the initial buffer content.
/// MFM is enabled by setting \ref RAIL_TxDataSource_t::TX_MFM_DATA using
/// \ref RAIL_ConfigData() and is activated when transmit is started by
/// \ref RAIL_StartTx(). Once transmitting the data in the ping-pong buffers,
/// RAIL will manage them so it looks like a continuous transmission to the
/// receiver. Every time one of the ping-pong buffers has been transmitted,
/// \ref RAIL_EVENT_MFM_TX_BUFFER_DONE is triggered so the application can
/// update the data in that buffer without the need to start/stop the
/// transmission. \ref RAIL_EVENT_MFM_TX_BUFFER_DONE can be enable with \ref
/// RAIL_ConfigEvents().
/// Use \ref RAIL_StopTx() to finish transmitting.
/// @code{.c}
/// #define MFM_RAW_BUF_WORDS 128
/// extern RAIL_Handle_t railHandle;
/// uint8_t txCount = 0;
/// uint32_t mfmPingPongBuffers[2][MFM_RAW_BUF_WORDS];
///
/// typedef struct mfmConfigApp {
/// RAIL_MFM_PingPongBufferConfig_t buffer;
/// RAIL_StateTiming_t timings;
/// RAIL_DataConfig_t dataConfig;
/// } mfmConfigApp_t;
///
/// static mfmConfigApp_t mfmConfig = {
/// .buffer = {
/// .pBuffer0 = (&mfmPingPongBuffers[0]),
/// .pBuffer1 = (&mfmPingPongBuffers[1]),
/// .bufferSizeWords = MFM_RAW_BUF_WORDS,
/// },
/// .timings = {
/// .idleToTx = 100,
/// .idleToRx = 0,
/// .rxToTx = 0,
/// .txToRx = 0,
/// .rxSearchTimeout = 0,
/// .txToRxSearchTimeout = 0
/// },
/// .dataConfig = {
/// .txSource = TX_MFM_DATA,
/// .rxSource = RX_PACKET_DATA,
/// .txMethod = PACKET_MODE,
/// .rxMethod = PACKET_MODE,
/// },
/// };
///
/// // Main RAIL events handler callback
/// static void RAILCb_Event(RAIL_Handle_t railHandle, RAIL_Events_t events)
/// {
/// // Increment TX counter
/// if (events & RAIL_EVENT_MFM_BUF_DONE) {
/// txCount++;
/// return;
/// }
/// }
/// }
///
/// void mfmInit(void)
/// {
/// // initialize MFM
/// uint32_t idx;
/// uint32_t *pDst0 = mfmConfig.buffer.pBuffer0;
/// uint32_t *pDst1 = mfmConfig.buffer.pBuffer1;
/// for (idx = 0; idx < (mfmConfig.buffer.bufferSizeWords / 4); idx++) {
/// pDst0[4 * idx + 0] = 0x755A3100;
/// pDst1[4 * idx + 0] = 0x755A3100;
/// pDst0[4 * idx + 1] = 0x315A757F;
/// pDst1[4 * idx + 1] = 0x315A757F;
/// pDst0[4 * idx + 2] = 0x8BA6CF00;
/// pDst1[4 * idx + 2] = 0x8BA6CF00;
/// pDst0[4 * idx + 3] = 0xCFA68B81;
/// pDst1[4 * idx + 3] = 0xCFA68B81;
/// }
///
/// RAIL_Status_t status;
/// status = RAIL_SetMfmPingPongFifo(railHandle, &mfmConfig.buffer);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// status = RAIL_SetStateTiming(railHandle, &mfmConfig.timings);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// mfmConfig.dataConfig.txSource = TX_MFM_DATA;
/// status = RAIL_ConfigData(railHandle, &mfmConfig.dataConfig);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// // start transmitting
/// status = RAIL_StartTx(railHandle, 0, 0, NULL);
/// assert(status == RAIL_STATUS_NO_ERROR);
/// }
///
/// void mfmDeInit(void)
/// {
/// RAIL_Status_t status;
/// status = RAIL_StopTx(railHandle, RAIL_STOP_MODES_ALL);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// mfmConfig.dataConfig.txSource = TX_PACKET_DATA;
/// status = RAIL_ConfigData(railHandle, &mfmConfig.dataConfig);
/// assert(status == RAIL_STATUS_NO_ERROR);
/// }
/// @endcode
///
/// @{
/**
* @struct RAIL_MFM_PingPongBufferConfig_t
* @brief A configuration structure for MFM Ping-pong buffer in RAIL.
*/
typedef struct RAIL_MFM_PingPongBufferConfig {
/** Pointer to buffer 0. Must be 32-bit aligned. */
uint32_t *pBuffer0;
/** Pointer to buffer 1. Must be 32-bit aligned. */
uint32_t *pBuffer1;
/** Size of each buffer in 32-bit words. */
uint32_t bufferSizeWords;
} RAIL_MFM_PingPongBufferConfig_t;
/**
* Set MFM ping-pong buffer.
*
* @param[in] railHandle A handle of RAIL instance.
* @param[in] config A non-NULL pointer to the MFM ping-pong buffer configuration structure.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_SetMfmPingPongFifo(RAIL_Handle_t railHandle,
const RAIL_MFM_PingPongBufferConfig_t *config);
/** @} */ // end of MFM
#ifdef __cplusplus
}
#endif
#endif // __RAIL_MFM_H__

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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __PA_CURVES_H_
#define __PA_CURVES_H_
#ifdef __cplusplus
extern "C" {
#endif
#define RAIL_PA_CURVES_PIECEWISE_SEGMENTS (9U)
#define RAIL_PA_CURVES_LP_VALUES (16U)
#define RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER 100
#define RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER -300
#define RAIL_PA_CURVES_2P4_HP_VBAT_CURVES \
{ { 255, 100, 22 }, \
{ 90, 1960, -116460 }, \
{ 36, 567, -7935 }, \
{ 22, 288, 6929 }, \
{ 16, 192, 9881 }, \
{ 11, 134, 10360 }, \
{ 8, 89, 9610 }, \
{ 6, 69, 8821 }, \
{ 4, 18, 5138 } }
#define RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER 0
#define RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER -260
#define RAIL_PA_CURVES_2P4_LP_VBAT_CURVES \
{ \
-252, /*! Power Level 0 */ \
-149, /*! Power Level 1 */ \
-97, /*! Power Level 2 */ \
-69, /*! Power Level 3 */ \
-52, /*! Power Level 4 */ \
-40, /*! Power Level 5 */ \
-32, /*! Power Level 6 */ \
-26, /*! Power Level 7 */ \
-22, /*! Power Level 8 */ \
-18, /*! Power Level 9 */ \
-15, /*! Power Level 10 */ \
-13, /*! Power Level 11 */ \
-11, /*! Power Level 12 */ \
-9, /*! Power Level 13 */ \
-8, /*! Power Level 14 */ \
-7, /*! Power Level 15 */ \
}
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHp = { \
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
#define RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT \
{ \
.curves = { \
{ \
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, \
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS, \
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX, \
.conversion = { .powerCurve = &RAIL_piecewiseDataHp }, \
}, \
{ \
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE, \
.segments = 0U, \
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX, \
.conversion = { .mappingTable = &RAIL_curves24Lp[0] }, \
}, \
} \
}
// *INDENT-OFF*
#ifdef __cplusplus
}
#endif
#endif

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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __PA_CURVES_H_
#define __PA_CURVES_H_
#ifdef __cplusplus
extern "C" {
#endif
#define RAIL_PA_CURVES_PIECEWISE_SEGMENTS (8U)
#define RAIL_PA_CURVES_LP_VALUES (16U)
#define RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER 200
#define RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER -338
#define RAIL_PA_CURVES_2P4_HP_VBAT_CURVES \
{ { 180, 2280, -291457 }, \
{ 78, 770, -46749 }, \
{ 44, 431, -6673 }, \
{ 27, 255, 6886 }, \
{ 17, 167, 10458 }, \
{ 10, 98, 10261 }, \
{ 6, 59, 8616 }, \
{ 3, 11, 3745 } }
#define RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER 200
#define RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER -338
#define RAIL_PA_CURVES_2P4_HP_DCDC_CURVES \
{ { 180, 2263, -287605 }, \
{ 78, 783, -47869 }, \
{ 45, 432, -6351 }, \
{ 26, 255, 7104 }, \
{ 17, 167, 10595 }, \
{ 10, 98, 10336 }, \
{ 6, 59, 8671 }, \
{ 3, 11, 3757 } }
#define RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER 0
#define RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER -260
#define RAIL_PA_CURVES_2P4_LP_VBAT_CURVES \
{ \
-250, /*! Power Level 0 */ \
-148, /*! Power Level 1 */ \
-95, /*! Power Level 2 */ \
-68, /*! Power Level 3 */ \
-51, /*! Power Level 4 */ \
-40, /*! Power Level 5 */ \
-32, /*! Power Level 6 */ \
-26, /*! Power Level 7 */ \
-22, /*! Power Level 8 */ \
-18, /*! Power Level 9 */ \
-16, /*! Power Level 10 */ \
-13, /*! Power Level 11 */ \
-12, /*! Power Level 12 */ \
-10, /*! Power Level 13 */ \
-9, /*! Power Level 14 */ \
-9, /*! Power Level 15 */ \
}
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = { \
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = { \
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
#define RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT \
{ \
.curves = { \
{ \
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, \
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS, \
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX, \
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat}, \
}, \
{ \
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE, \
.segments = 0U, \
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX, \
.conversion = { .mappingTable = &RAIL_curves24Lp[0] }, \
}, \
} \
}
// *INDENT-OFF*
#ifdef __cplusplus
}
#endif
#endif

801
Libs/platform/radio/rail_lib/plugin/pa-conversions/pa_conversions_efr32.c Normal file
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@@ -0,0 +1,801 @@
/***************************************************************************//**
* @file
* @brief PA power conversion functions provided to the customer as source for
* highest level of customization.
* @details This file contains the curves and logic that convert PA power
* levels to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
// For details on how to use this plugin, see
// https://www.silabs.com/documents/public/application-notes/an1127-power-amplifier-power-conversion-functions.pdf
#include "em_device.h"
#if defined(_SILICON_LABS_32B_SERIES_2) || defined(SIMULATION_DEVICE)
#include "em_cmu.h"
#else
#include "sl_clock_manager.h"
#endif
#include "pa_conversions_efr32.h"
#include "rail.h"
#define MAX(a, b) ((a) > (b) ? (a) : (b))
static RAIL_TxPowerCurvesConfigAlt_t powerCurvesState;
// Make sure SUPPORTED_PA_INDICES match the per-platform PA curves
// provided by RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT and resulting
// RAIL_TxPowerCurvesConfigAlt_t!
#ifndef SUPPORTED_PA_INDICES
#if defined(_SILICON_LABS_32B_SERIES_1)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
2U, /* SUBGIG_HP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 1)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
1U, /* 2P4GIG_MP */ \
2U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 2)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#define SUPPORTED_PA_INDICES { \
RAIL_NUM_PA, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
0U, /* SUBGIG_HP */ \
1U, /* SUBGIG_MP */ \
2U, /* SUBGIG_LP */ \
3U, /* SUBGIG_LLP */ \
/* The rest are unsupported */ \
}
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) || !defined(_SILICON_LABS_32B_SERIES_2))
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define SUPPORTED_PA_INDICES { \
RAIL_NUM_PA, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
0U, /* SUBGIG_POWERSETTING_TABLE */ \
RAIL_NUM_PA, /* SUBGIG_HP */ \
RAIL_NUM_PA, /* SUBGIG_MP */ \
RAIL_NUM_PA, /* SUBGIG_LP */ \
RAIL_NUM_PA, /* SUBGIG_LLP */ \
RAIL_NUM_PA, /* SUBGIG_HIGHEST */ \
1U, /* OFDM_PA_POWERSETTING_TABLE */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 7)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
1U, /* SUBGIG_HP */ \
2U, /* SUBGIG_MP */ \
3U, /* SUBGIG_LP */ \
4U, /* SUBGIG_LLP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#else
#error "unknown platform"
#endif
#endif
static const uint8_t supportedPaIndices[] = SUPPORTED_PA_INDICES;
#if defined(_SILICON_LABS_32B_SERIES_1) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
#define PA_CONVERSION_MINIMUM_PWRLVL 1U
#else
#define PA_CONVERSION_MINIMUM_PWRLVL 0U
#endif
// This macro is defined when Silicon Labs builds this into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. The macro
// should *not* be defined in a customer build.
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurves_t *RAIL_GetTxPowerCurve(RAIL_TxPowerMode_t mode)
{
static RAIL_TxPowerCurves_t powerCurves;
RAIL_TxPowerLevel_t maxPowerLevel, minPowerLevel;
if (RAIL_SupportsTxPowerModeAlt(RAIL_EFR32_HANDLE,
&mode,
&maxPowerLevel,
&minPowerLevel)
&& (mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
const RAIL_PaDescriptor_t *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
const RAIL_TxPowerCurveAlt_t *curve = modeInfo->conversion.powerCurve;
// Check for an invalid power curve
if (curve == NULL) {
return NULL;
}
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
powerCurves.maxPower = modeInfo->maxPowerDbm;
powerCurves.minPower = modeInfo->minPowerDbm;
// Mapping table does not have RAIL_TxPowerCurveSegment_t segments
powerCurves.powerParams = NULL;
} else
#endif
{
powerCurves.maxPower = curve->maxPower;
powerCurves.minPower = curve->minPower;
powerCurves.powerParams = &curve->powerParams[0];
}
return &powerCurves;
}
return NULL;
}
// This function will not be supported for any parts after efr32xg1x
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_InitTxPowerCurves(const RAIL_TxPowerCurvesConfig_t *config)
{
#ifdef _SILICON_LABS_32B_SERIES_1
// First PA is 2.4 GHz high power, using a piecewise fit
RAIL_PaDescriptor_t *current = &powerCurvesState.curves[0];
current->algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR;
current->segments = config->piecewiseSegments;
current->min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN;
current->max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX;
static RAIL_TxPowerCurveAlt_t txPower2p4 = {
.minPower = 0U,
.maxPower = 0U,
.powerParams = { // The current max number of piecewise segments is 8
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
}
};
txPower2p4.maxPower = config->txPowerSgCurves->maxPower;
txPower2p4.minPower = config->txPowerSgCurves->minPower;
(void) memcpy(&txPower2p4.powerParams[0],
config->txPowerSgCurves->powerParams,
config->piecewiseSegments * sizeof(RAIL_TxPowerCurveSegment_t));
current->conversion.powerCurve = &txPower2p4;
// Second PA is 2.4 GHz low power, using a mapping table
current = &powerCurvesState.curves[1];
current->algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE;
current->segments = 0U;
current->min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN;
current->max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX;
current->conversion.mappingTable = config->txPower24LpCurves;
// Third and final PA is Sub-GHz, using a piecewise fit
current = &powerCurvesState.curves[2];
current->algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR;
current->segments = config->piecewiseSegments;
current->min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN;
current->max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX;
static RAIL_TxPowerCurveAlt_t txPowerSubGig = {
.minPower = 0U,
.maxPower = 0U,
.powerParams = { // The current max number of piecewise segments is 8
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
}
};
txPowerSubGig.maxPower = config->txPowerSgCurves->maxPower;
txPowerSubGig.minPower = config->txPowerSgCurves->minPower;
(void) memcpy(&txPowerSubGig.powerParams[0],
config->txPowerSgCurves->powerParams,
config->piecewiseSegments * sizeof(RAIL_TxPowerCurveSegment_t));
current->conversion.powerCurve = &txPowerSubGig;
return RAIL_STATUS_NO_ERROR;
#else
(void) config;
return RAIL_STATUS_INVALID_CALL;
#endif
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_InitTxPowerCurvesAlt(const RAIL_TxPowerCurvesConfigAlt_t *config)
{
RAIL_Status_t status = RAIL_VerifyTxPowerCurves(config);
if (status == RAIL_STATUS_NO_ERROR) {
powerCurvesState = *config;
}
return status;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
const RAIL_PaPowerSetting_t *RAIL_GetPowerSettingTable(RAIL_Handle_t railHandle, RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *minPower, RAIL_TxPower_t *maxPower,
RAIL_TxPowerLevel_t *step)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
*minPower = modeInfo->minPowerDbm;
*maxPower = modeInfo->maxPowerDbm;
*step = modeInfo->step;
return (RAIL_PaPowerSetting_t*)(modeInfo->conversion.mappingTable);
}
return NULL;
#else
(void)mode;
(void)minPower;
(void)maxPower;
(void)step;
return NULL;
#endif
}
#endif // RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_ConvertDbmToPowerSettingEntry(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t power,
RAIL_TxPowerSettingEntry_t *powerSettingInfo)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
RAIL_TxPower_t minPower = modeInfo->minPowerDbm;
RAIL_TxPower_t maxPower = modeInfo->maxPowerDbm;
RAIL_TxPowerLevel_t step = modeInfo->step;
// Cap the power to within the range of the mapping table
if (power < minPower) {
power = minPower;
} else if (power > maxPower) {
power = maxPower;
} else {
// Power level is within bounds (MISRA required else)
}
// Calculate indices
uint32_t maxIndex = (uint32_t)((maxPower - minPower) / step);
uint32_t powerIndex = (uint32_t)((power - minPower) / step);
// Ensure powerIndex is within bounds
if (powerIndex > maxIndex) {
powerIndex = maxIndex;
}
RAIL_PaPowerSetting_t powerSetting = modeInfo->conversion.mappingTable[powerIndex];
while ((powerIndex > 0U)
&& (powerSetting == (RAIL_PaPowerSetting_t)modeInfo->conversion.mappingTable[powerIndex - 1U])) {
powerIndex--;
}
power = minPower + ((RAIL_TxPower_t)powerIndex * step);
powerSettingInfo->paPowerSetting = powerSetting;
powerSettingInfo->minPaPowerDdbm = minPower;
powerSettingInfo->maxPaPowerDdbm = maxPower;
powerSettingInfo->currentPaPowerDdbm = power;
return RAIL_STATUS_NO_ERROR;
}
}
return RAIL_STATUS_INVALID_CALL;
#else
(void) mode;
(void) power;
(void) powerSettingInfo;
return RAIL_STATUS_INVALID_CALL;
#endif //RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_TxPowerLevel_t RAIL_ConvertDbmToRaw(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t power)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
// Powersetting tables do not have raw powerlevels.
// Could use RAIL_ConvertDbmToPowerSettingEntry
(void)mode;
(void) power;
#else
// When a channel dBm limitation greater than or equal to \ref RAIL_TX_POWER_MAX
// is converted to raw units, the max RAIL_TxPowerLevel_t will be
// returned. When compared to the current power level of the PA,
// it will always be greater, indicating that no power coercion
// is necessary to comply with channel limitations.
if (power >= RAIL_TX_POWER_MAX) {
return 255U;
}
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
uint32_t minPowerLevel = MAX(modeInfo->min, PA_CONVERSION_MINIMUM_PWRLVL);
// If we're in low power mode, just use the simple lookup table
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
// Binary search through the lookup table to find the closest power level
// without going over.
uint32_t lower = 0U;
// Track the high side of the estimate
uint32_t powerIndex = modeInfo->max - minPowerLevel;
while (lower < powerIndex) {
// Calculate the midpoint of the current range
uint32_t index = powerIndex - (powerIndex - lower) / 2U;
if (power < modeInfo->conversion.mappingTable[index]) {
powerIndex = index - 1U;
} else {
lower = index;
}
}
return (RAIL_TxPowerLevel_t)(powerIndex + minPowerLevel);
}
// Here we know we're using the piecewise linear conversion
RAIL_TxPowerCurveAlt_t const *paParams = modeInfo->conversion.powerCurve;
// Check for valid paParams before using them
if (paParams == NULL) {
return 0U;
}
// Cap the power based on the PA settings.
if (power > paParams->maxPower) {
// If we go above the maximum dbm the chip supports
// Then provide maximum powerLevel
power = paParams->maxPower;
} else if (power < paParams->minPower) {
// If we go below the minimum we want included in the curve fit, force it.
power = paParams->minPower;
} else {
// Do nothing, power is OK
}
// Map the power value to a 0 - 7 curveIndex value
//There are 8 segments of step size of RAIL_TX_POWER_CURVE_INCREMENT in deci dBm
//starting from maximum RAIL_TX_POWER_CURVE_MAX in deci dBm
// These are just starting points to give the code
// a rough idea of which segment to use, based on
// how they were fit. Adjustments are made later on
// if this turns out to be incorrect.
RAIL_TxPower_t txPowerMax = RAIL_TX_POWER_CURVE_DEFAULT_MAX;
RAIL_TxPower_t txPowerIncrement = RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT;
int16_t curveIndex = 0;
// if the first curve segment starts with RAIL_TX_POWER_LEVEL_INVALID
//It is an extra curve segment to depict the maxpower and increment
// (in deci-dBm) used while generating the curves.
// The extra segment is only present when curve segment is generated by
//using values different than the default - RAIL_TX_POWER_CURVE_DEFAULT_MAX
// and RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT.
if ((paParams->powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
curveIndex += 1;
txPowerMax = (RAIL_TxPower_t) paParams->powerParams[0].slope;
txPowerIncrement = (RAIL_TxPower_t) paParams->powerParams[0].intercept;
}
curveIndex += (txPowerMax - power) / txPowerIncrement;
if ((curveIndex > ((int16_t)modeInfo->segments - 1))
|| (curveIndex < 0)) {
curveIndex = ((int16_t)modeInfo->segments - 1);
}
uint32_t powerLevel;
do {
// Select the correct piecewise segment to use for conversion.
RAIL_TxPowerCurveSegment_t const *powerParams =
&paParams->powerParams[curveIndex];
// powerLevel can only go down to 0.
int32_t powerLevelInt = powerParams->intercept + ((int32_t)powerParams->slope * (int32_t)power);
if (powerLevelInt < 0) {
powerLevel = 0U;
} else {
powerLevel = (uint32_t) powerLevelInt;
}
// RAIL_LIB-8330: Modified from adding 500 to adding 92, this was tested on xg21 as being the highest
// number we can use without exceeding the requested power in dBm
powerLevel = ((powerLevel + 92U) / 1000U);
// In case it turns out the resultant power level was too low and we have
// to recalculate with the next curve...
curveIndex++;
} while ((curveIndex < (int16_t)modeInfo->segments)
&& (powerLevel <= paParams->powerParams[curveIndex].maxPowerLevel));
// We already know that curveIndex is at most modeInfo->segments
if (powerLevel > paParams->powerParams[curveIndex - 1].maxPowerLevel) {
powerLevel = paParams->powerParams[curveIndex - 1].maxPowerLevel;
}
// If we go below the minimum we want included in the curve fit, force it.
if (powerLevel < minPowerLevel) {
powerLevel = minPowerLevel;
}
return (RAIL_TxPowerLevel_t)powerLevel;
}
#endif // RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
return 0U;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_TxPower_t RAIL_ConvertRawToDbm(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPowerLevel_t powerLevel)
{
(void)railHandle;
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
// Limit the max power level
if (powerLevel > modeInfo->max) {
powerLevel = modeInfo->max;
}
// We 1-index low power PA power levels, but of course arrays are 0 indexed
powerLevel -= MAX(modeInfo->min, PA_CONVERSION_MINIMUM_PWRLVL);
//If the index calculation above underflowed, then provide the lowest array index.
if (powerLevel > (modeInfo->max - modeInfo->min)) {
powerLevel = 0U;
}
return modeInfo->conversion.mappingTable[powerLevel];
} else {
#if defined(_SILICON_LABS_32B_SERIES_1) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
// Although 0 is a legitimate power on non-2.4 LP PA's and can be set via
// "RAIL_SetTxPower(railHandle, 0)" it is MUCH lower than power
// level 1 (approximately -50 dBm). Including it in the piecewise
// linear fit would skew the curve substantially, so we exclude it
// from the conversion.
if (powerLevel == 0U) {
return -500;
}
#endif
RAIL_TxPowerCurveAlt_t const *powerCurve = modeInfo->conversion.powerCurve;
// Check for a valid powerCurve pointer before using it
if (powerCurve == NULL) {
return RAIL_TX_POWER_MIN;
}
RAIL_TxPowerCurveSegment_t const *powerParams = powerCurve->powerParams;
// Hard code the extremes (i.e. don't use the curve fit) in order
// to make it clear that we are reaching the extent of the chip's
// capabilities
if (powerLevel <= modeInfo->min) {
return powerCurve->minPower;
} else if (powerLevel >= modeInfo->max) {
return powerCurve->maxPower;
} else {
// Power level is within bounds (MISRA required else)
}
// Figure out which parameter to use based on the power level
uint8_t x = 0;
uint8_t upperBound = modeInfo->segments - 1U;
// If the first curve segment starts with RAIL_TX_POWER_LEVEL_INVALID,
// then it is an additional curve segment that stores maxpower and increment
// (in deci-dBm) used to generate the curves.
// The extra info segment is present only if the curves were generated using
// values other than default - RAIL_TX_POWER_CURVE_DEFAULT_MAX and
// RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT.
if ((powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
x = 1U; // skip over the first entry
}
for (; x < upperBound; x++) {
if (powerParams[x + 1U].maxPowerLevel < powerLevel) {
break;
}
}
int32_t power;
power = ((1000 * (int32_t)(powerLevel)) - powerParams[x].intercept);
power = ((power + ((int32_t)powerParams[x].slope / 2)) / (int32_t)powerParams[x].slope);
if (power > powerCurve->maxPower) {
return powerCurve->maxPower;
} else if (power < powerCurve->minPower) {
return powerCurve->minPower;
} else {
return (RAIL_TxPower_t)power;
}
}
}
return RAIL_TX_POWER_MIN;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_GetTxPowerCurveLimits(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *maxPower,
RAIL_TxPower_t *increment)
{
(void)railHandle;
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
*maxPower = modeInfo->maxPowerDbm;
*increment = modeInfo->step;
return RAIL_STATUS_NO_ERROR;
}
#endif
//The power max info only for available Linear fit
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
return RAIL_STATUS_INVALID_CALL;
}
*maxPower = RAIL_TX_POWER_CURVE_DEFAULT_MAX;
*increment = RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT;
RAIL_TxPowerCurveAlt_t const *paParams = modeInfo->conversion.powerCurve;
if ((paParams->powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
*maxPower = paParams->powerParams[0].slope;
*increment = (RAIL_TxPower_t)paParams->powerParams[0].intercept;
}
return RAIL_STATUS_NO_ERROR;
}
return RAIL_STATUS_INVALID_PARAMETER;
}
// This macro is defined when Silicon Labs builds curves into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#if !defined(RAIL_PA_CONVERSIONS_WEAK) && !defined(HAL_CONFIG)
#include "sl_rail_util_pa_config.h"
void sl_rail_util_pa_init(void)
{
#if SL_RAIL_UTIL_PA_VOLTAGE_MV > 1800
(void)RAIL_InitTxPowerCurvesAlt(&RAIL_TxPowerCurvesVbat);
#else
(void)RAIL_InitTxPowerCurvesAlt(&RAIL_TxPowerCurvesDcdc);
#endif
#if SL_RAIL_UTIL_PA_CALIBRATION_ENABLE
RAIL_EnablePaCal(true);
#else
RAIL_EnablePaCal(false);
#endif
}
#if RAIL_SUPPORTS_2P4GHZ_BAND
static RAIL_TxPowerConfig_t txPowerConfig2p4Ghz = {
.mode = SL_RAIL_UTIL_PA_SELECTION_2P4GHZ,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
.rampTime = SL_RAIL_UTIL_PA_RAMP_TIME_US,
};
#endif
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_2p4ghz(void)
{
#if RAIL_SUPPORTS_2P4GHZ_BAND
return &txPowerConfig2p4Ghz;
#else
return NULL;
#endif
}
#if RAIL_SUPPORTS_SUBGHZ_BAND
static RAIL_TxPowerConfig_t txPowerConfigSubGhz = {
.mode = SL_RAIL_UTIL_PA_SELECTION_SUBGHZ,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
.rampTime = SL_RAIL_UTIL_PA_RAMP_TIME_US,
};
#endif
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_subghz(void)
{
#if RAIL_SUPPORTS_SUBGHZ_BAND
return &txPowerConfigSubGhz;
#else
return NULL;
#endif
}
#if RAIL_SUPPORTS_OFDM_PA
#ifndef SL_RAIL_UTIL_PA_SELECTION_OFDM
#define SL_RAIL_UTIL_PA_SELECTION_OFDM RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE
#endif
static RAIL_TxPowerConfig_t txPowerConfigOFDM = {
.mode = SL_RAIL_UTIL_PA_SELECTION_OFDM,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
};
#endif // RAIL_SUPPORTS_OFDM_PA
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_ofdm(void)
{
#if RAIL_SUPPORTS_OFDM_PA
return &txPowerConfigOFDM;
#else
return NULL;
#endif // RAIL_SUPPORTS_OFDM_PA
}
void sl_rail_util_pa_on_channel_config_change(RAIL_Handle_t rail_handle,
const RAIL_ChannelConfigEntry_t *entry)
{
if (!RAIL_IsPaAutoModeEnabled(rail_handle)) {
RAIL_TxPowerConfig_t currentTxPowerConfig;
RAIL_TxPowerConfig_t *newTxPowerConfigPtr;
RAIL_Status_t status;
// Get current TX Power Config.
status = RAIL_GetTxPowerConfig(rail_handle, &currentTxPowerConfig);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't get TX Power Config
}
#if RAIL_SUPPORTS_DUAL_BAND
// Determine new TX Power Config.
if (entry->baseFrequency < 1000000000UL) {
newTxPowerConfigPtr = &txPowerConfigSubGhz;
} else {
newTxPowerConfigPtr = &txPowerConfig2p4Ghz;
}
#else
(void) entry;
#if RAIL_SUPPORTS_2P4GHZ_BAND
newTxPowerConfigPtr = &txPowerConfig2p4Ghz;
#else
newTxPowerConfigPtr = &txPowerConfigSubGhz;
#endif
#endif
#if RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG
if (currentTxPowerConfig.mode == RAIL_TX_POWER_MODE_NONE) {
#if RAIL_SUPPORTS_OFDM_PA
if (RAIL_SupportsTxPowerModeAlt(rail_handle,
&txPowerConfigOFDM.mode,
NULL, NULL)) {
// Apply OFDM Power Config.
status = RAIL_ConfigTxPower(rail_handle, &txPowerConfigOFDM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Set default TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, SL_RAIL_UTIL_PA_POWER_DECI_DBM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
}
#endif // RAIL_SUPPORTS_OFDM_PA
// Apply FSK Power Config.
status = RAIL_ConfigTxPower(rail_handle, newTxPowerConfigPtr);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Set default TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, SL_RAIL_UTIL_PA_POWER_DECI_DBM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
}
#else
// Call RAIL_ConfigTxPower only if TX Power Config mode has changed.
if (currentTxPowerConfig.mode != newTxPowerConfigPtr->mode) {
// Save current TX power before RAIL_ConfigTxPower (because not preserved).
RAIL_TxPower_t txPowerDeciDbm;
if (currentTxPowerConfig.mode == RAIL_TX_POWER_MODE_NONE) {
txPowerDeciDbm = SL_RAIL_UTIL_PA_POWER_DECI_DBM;
} else {
txPowerDeciDbm = RAIL_GetTxPowerDbm(rail_handle);
}
// Apply new TX Power Config.
status = RAIL_ConfigTxPower(rail_handle, newTxPowerConfigPtr);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Restore TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, txPowerDeciDbm);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
// If requested a HIGHEST setting, update it with the real one selected
// to short-circuit the next time through here since HIGHEST never
// matches the real PA returned by RAIL_GetTxPowerConfig(), causing
// reconfiguration of the same PA on every callback.
if (false
#ifdef RAIL_TX_POWER_MODE_2P4GIG_HIGHEST
|| (newTxPowerConfigPtr->mode == RAIL_TX_POWER_MODE_2P4GIG_HIGHEST)
#endif
#ifdef RAIL_TX_POWER_MODE_SUBGIG_HIGHEST
|| (newTxPowerConfigPtr->mode == RAIL_TX_POWER_MODE_SUBGIG_HIGHEST)
#endif
) {
(void) RAIL_GetTxPowerConfig(rail_handle, &currentTxPowerConfig);
newTxPowerConfigPtr->mode = currentTxPowerConfig.mode;
}
}
#endif
} // !RAIL_IsPaAutoModeEnabled
}
#endif // !RAIL_PA_CONVERSIONS_WEAK

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/***************************************************************************//**
* @file
* @brief PA power conversion functions provided to the customer as source for
* highest level of customization.
* @details This file contains the curves and logic that convert PA power
* levels to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CONVERSIONS_EFR32_H
#define PA_CONVERSIONS_EFR32_H
#include "rail_types.h"
// This macro is defined when Silicon Labs builds curves into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#ifndef RAIL_PA_CONVERSIONS_WEAK
#ifdef SL_RAIL_UTIL_PA_CONFIG_HEADER
#include SL_RAIL_UTIL_PA_CONFIG_HEADER
#else
#include "sl_rail_util_pa_conversions_efr32_config.h"
#endif
#endif
#ifdef HAL_CONFIG
#include "hal-config.h"
#ifdef HAL_PA_CURVE_HEADER
#ifdef SL_RAIL_UTIL_PA_CURVE_HEADER
#undef SL_RAIL_UTIL_PA_CURVE_HEADER
#endif
#define SL_RAIL_UTIL_PA_CURVE_HEADER HAL_PA_CURVE_HEADER
#endif
#endif
#ifdef SL_RAIL_UTIL_PA_CURVE_TYPES
#include SL_RAIL_UTIL_PA_CURVE_TYPES
#else
#include "pa_curve_types_efr32.h"
#endif
#ifdef SL_RAIL_UTIL_PA_CURVE_HEADER
#include SL_RAIL_UTIL_PA_CURVE_HEADER
#else
#include "pa_curves_efr32.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup PA_Curve_Conversions PA Curve Conversions
* @ingroup PA
* @{
*/
/// The curves to be used when battery voltage powers transmission
extern const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat;
/// The curves to be used when the DC-DC converter powers transmission
extern const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc;
/**
* Initialize Transmit power curves.
*
* @param[in] config A pointer to the custom TX power curves.
* @return Status code indicating success of the function call.
*
* @deprecated function is no longer supported.
* Must use \ref RAIL_InitTxPowerCurvesAlt() instead.
*/
RAIL_Status_t RAIL_InitTxPowerCurves(const RAIL_TxPowerCurvesConfig_t *config);
/**
* Initialize TxPower curves.
*
* @param[in] config A pointer to the custom TX power curves to use.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_InitTxPowerCurvesAlt(const RAIL_TxPowerCurvesConfigAlt_t *config);
/**
* Gets the curve that should be used for conversion functions based on the
* current PA configuration.
*
* @param[in] mode PA mode whose curves are needed.
* @return A pointer to the \ref RAIL_TxPowerCurves_t that are used for conversion functions.
*
* @note: If the mode is not supported by the the chip,
* then NULL will be returned.
*/
RAIL_TxPowerCurves_t const *RAIL_GetTxPowerCurve(RAIL_TxPowerMode_t mode);
/**
* Gets the maximum power in deci-dBm that should be used for calculating
* the segments and to find right curve segment to convert Dbm to raw power
* level for a specific PA.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] mode PA mode whose curves are needed.
* @param[out] maxpower A non-NULL pointer to memory allocated to hold
* the max power in deci-dBm used in calculation of curve segments.
* @param[out] increment A non-NULL pointer to memory allocated to hold
* the increment in deci-dBm used in calculation of curve segments.
* @return Status code indicating success of the function call.
*
* For the PAs with \ref RAIL_PaConversionAlgorithm_t
* \ref RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, if the curves are generated with
* maxPower and increment other than \ref RAIL_TX_POWER_CURVE_DEFAULT_MAX and
* \ref RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT respectively, then the first
* \ref RAIL_TxPowerCurveSegment_t has its maxPowerLevel equal to
* \ref RAIL_TX_POWER_LEVEL_INVALID and its slope and intercept stores the
* maxPower and increment in deci-dBm respectively.
*/
RAIL_Status_t RAIL_GetTxPowerCurveLimits(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *maxpower,
RAIL_TxPower_t *increment);
/**
* Initialize PA TX Curves.
*/
void sl_rail_util_pa_init(void);
/**
* Get a pointer to the TX Power Config 2.4 GHz structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_2p4ghz(void);
/**
* Get a pointer to the TX Power Config Sub-GHz structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_subghz(void);
/**
* Get a pointer to the TX Power Config OFDM structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_ofdm(void);
/**
* Provide a channel config change callback capable of configuring the PA
* correctly.
*
* @param[in] rail_handle The RAIL handle being passed into this callback.
* @param[in] entry A pointer to the channel config entry being switched
* to by hardware.
*/
void sl_rail_util_pa_on_channel_config_change(RAIL_Handle_t rail_handle,
const RAIL_ChannelConfigEntry_t *entry);
/** @} */ // PA_Curve_Conversions
#ifdef __cplusplus
}
#endif
#endif // PA_CONVERSIONS_EFR32_H

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/***************************************************************************//**
* @file
* @brief PA power conversion curve types used by Silicon Labs PA power
* conversion functions.
* @details This file contains the curve types needed convert PA power levels
* to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CURVE_TYPES_EFR32_H
#define PA_CURVE_TYPES_EFR32_H
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup PA_Curve_Conversions PA Curve Conversions
* @ingroup PA
* @{
*/
/**
* @struct RAIL_TxPowerCurveSegment_t
*
* @brief Structure containing data defining each segment of the
* deci-dBm to raw power level mapping curve fits.
*
* Note, these used in an equation of the form:
*
* powerLevel * 1000 = slope * power + intercept
*
* powerLevel is the 0-252/0-248/1-7 values used in the RAIL_Get/SetTxPower()
* functions, and power is the actual output power of the PA, specified
* in deci-dBm.
*
* @note If the curves are generated with
* maxPower and increment other than \ref RAIL_TX_POWER_CURVE_DEFAULT_MAX and
* \ref RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT respectively, then the first
* \ref RAIL_TxPowerCurveSegment_t has its maxPowerLevel equal to
* \ref RAIL_TX_POWER_LEVEL_INVALID and its slope and intercept stores the
* maxPower and increment in deci-dBm respectively.
*/
typedef struct RAIL_TxPowerCurveSegment {
/** The highest power level that this segment will be used to convert */
uint16_t maxPowerLevel;
/** slope of the line */
int16_t slope;
/** y-intercept of the line */
int32_t intercept;
} RAIL_TxPowerCurveSegment_t;
/**
* @struct RAIL_TxPowerCurves_t
*
* @brief Structure containing the min and max values for a given
* PA and voltage supply combination (in deci-dBm).
*/
typedef struct RAIL_TxPowerCurves {
/** max deci-dBm value */
int16_t maxPower;
/** min deci-dBm value */
int16_t minPower;
/**
* Pointer to an array of \ref RAIL_TxPowerCurvesConfig_t::piecewiseSegments
* elements of \ref RAIL_TxPowerCurveSegment_t for deci-dBm to raw
* power level conversion fits.
*/
const RAIL_TxPowerCurveSegment_t *powerParams;
} RAIL_TxPowerCurves_t;
/**
* @struct RAIL_TxPowerCurvesConfig_t
*
* @brief Structure containing curve fit information and other metadata
* required to properly use the WEAK versions of RAIL_ConvertRawToDb
* and RAIL_ConvertDbmToRaw.
*/
typedef struct RAIL_TxPowerCurvesConfig {
/**
* Pointer a RAIL_TxPowerCurves_t representing the piecewise linear segments
* of curves that map power level to power in dBm for the 2.4 GHz high power
* PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurves_t *txPower24HpCurves;
/**
* Pointer a RAIL_TxPowerCurves_t representing the piecewise linear segments
* of curves that map power level to power in dBm for the subgig PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurves_t *txPowerSgCurves;
/**
* Look up table for each of the power levels of the 2.4GHz low power
* amplifier and their equivalent deci-dB value.
*/
const int16_t *txPower24LpCurves;
/**
* The number of piecewise segments provided to the PA in each of the four
* conversion curve fits. The default is 8, but regardless of the number, it
* must be the same for all curves.
*/
uint8_t piecewiseSegments;
} RAIL_TxPowerCurvesConfig_t;
/**
* @enum RAIL_PaConversionAlgorithm_t
* @brief PA conversion algorithms types for converting between dBm and power levels
*/
RAIL_ENUM(RAIL_PaConversionAlgorithm_t) {
/** Piecewise linear fit */
RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
/** Mapping table between quantities */
RAIL_PA_ALGORITHM_MAPPING_TABLE,
/** Mapping table between pa power settings and dBm values */
RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_PA_ALGORITHM_PIECEWISE_LINEAR ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_PIECEWISE_LINEAR)
#define RAIL_PA_ALGORITHM_MAPPING_TABLE ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_MAPPING_TABLE)
#define RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE)
#endif//DOXYGEN_SHOULD_SKIP_THIS
/**
* @struct RAIL_TxPowerCurveAlt_t
*
* @brief Structure containing the min and max values for a given
* PA and voltage supply combination (in deci-dBm).
*/
typedef struct RAIL_TxPowerCurveAlt {
/** max deci-dBm value */
int16_t maxPower;
/** min deci-dBm value */
int16_t minPower;
/**
* Array of \ref RAIL_PaDescriptor_t::segments \ref RAIL_TxPowerCurveSegment_t
* structures for the deci-dBm to raw power level conversion fits.
*/
//Array does not have a size since it can be various sizes.
//No further fields allowed after this one.
RAIL_TxPowerCurveSegment_t powerParams[];
} RAIL_TxPowerCurveAlt_t;
#ifndef DOXYGEN_SHOULD_SKIP_THIS
#if defined(SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION)
#if RAIL_SUPPORTS_COMMON_PA_INTERFACE
#if SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION == 1
/// The entry in the powersetting table have the below bitfields
/// |15-14 =sub-mode|13-8:unused|7-0:scalor(stripe+slice)|
/// Mask for submode
#define SLI_RAIL_UTIL_PA_TABLE_SUBMODE_MASK 0xC000UL
/// Shift for submode
#define SLI_RAIL_UTIL_PA_TABLE_SUBMODE_SHIFT 14U
/// Mask for scalor
#define SLI_RAIL_UTIL_PATABLE_SCALOR_MASK 0xFFU
/// Shift for scalor
#define SLI_RAIL_UTIL_PA_TABLE_SCALOR_SHIFT 0U
#endif //SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION == 1
#endif //RAIL_SUPPORTS_COMMON_PA_INTERFACE
#endif //defined(SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* @struct RAIL_PowerConversion_t
*
* @brief Union containing a pointer to algorithm-specific conversion data.
*/
typedef union RAIL_PowerConversion {
/**
* Pointer to a powerCurve containing line segment data for the curves
* corresponding to a specific PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurveAlt_t *powerCurve;
/**
* Lookup table for PA's which use the mapping table algorithm for converting
* between deci-dBm and power levels.
*/
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#if RAIL_SUPPORTS_COMMON_PA_INTERFACE
const int16_t *mappingTable;
#else
const int32_t *mappingTable;
#endif
#else
const int16_t *mappingTable;
#endif
} RAIL_PowerConversion_t;
/**
* @struct RAIL_PaDescriptor_t
*
* @brief Struct containing specifics of PA configuration.
* PA descriptor as used in the PA conversion functions.
*/
typedef struct RAIL_PaDescriptor {
/** Algorithm used to map dBm to power levels for this PA. */
RAIL_PaConversionAlgorithm_t algorithm;
/**
* The number of piecewise segments provided to the PA in a piecewise linear
* curve fit. The default is 8. Should be set to 0 when not using the
* piecewise linear algorithm.
*/
uint8_t segments;
/** Min power level for this PA. */
RAIL_TxPowerLevel_t min;
/** Max power level for this PA. */
RAIL_TxPowerLevel_t max;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
/** step size in deci-dBm between entries in table. */
RAIL_TxPowerLevel_t step;
/** structure padding. */
uint8_t padding;
/** structure padding. */
uint16_t padding2;
/** Min power in deci-dBm for this PA. */
RAIL_TxPower_t minPowerDbm;
/** Max power in deci-dBm for this PA. */
RAIL_TxPower_t maxPowerDbm;
#endif
/** Union containing a pointer to algorithm-specific conversion data. */
RAIL_PowerConversion_t conversion;
} RAIL_PaDescriptor_t;
/**
* @struct RAIL_TxPowerCurvesConfigAlt_t
*
* @brief More generic structure containing information about
* piecewise linear curves and mapping tables, instead of specific PA's.
*/
typedef struct RAIL_TxPowerCurvesConfigAlt {
/** The curves for each PA. */
RAIL_PaDescriptor_t curves[RAIL_NUM_PA];
/** Signature used for validation of the curves configuruation. */
uint32_t signature;
/** PA VDD voltage, in millivolts. */
uint16_t paVoltage;
} RAIL_TxPowerCurvesConfigAlt_t;
/** @} */ // PA_Curve_Conversions
#ifdef __cplusplus
}
#endif
#endif // PA_CURVE_TYPES_EFR32_H

383
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/***************************************************************************//**
* @file
* @brief Default PA power conversion structures with curves calibrated by the
* RAIL team.
* @details This file contains the curves that convert PA power levels to dBm
* powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
// This entire file should never be used on FCC pre-certified modules
#ifndef _SILICON_LABS_MODULE
#include "em_device.h"
#include "pa_conversions_efr32.h"
#if defined(_SILICON_LABS_32B_SERIES_1)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataSgVbat = {
RAIL_PA_CURVES_SG_VBAT_MAX_POWER,
RAIL_PA_CURVES_SG_VBAT_MIN_POWER,
RAIL_PA_CURVES_SG_VBAT_CURVES
};
static const int16_t RAIL_curves24LpVbat[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP;
// This macro is defined when Silicon Labs builds this into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24LpVbat[0] },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN,
.max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataSgVbat },
},
},
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = {
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataSgDcdc = {
RAIL_PA_CURVES_SG_DCDC_MAX_POWER,
RAIL_PA_CURVES_SG_DCDC_MIN_POWER,
RAIL_PA_CURVES_SG_DCDC_CURVES
};
static const int16_t RAIL_curves24LpDcdc[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpDcdc },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24LpDcdc[0] },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN,
.max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataSgDcdc },
},
},
};
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_5)
static const int32_t RAIL_curvesOFDM[RAIL_PA_CURVES_OFDM_CURVES_NUM_VALUES] =
RAIL_PA_CURVES_OFDM_CURVES;
static const int32_t RAIL_curvesSubgig[RAIL_PA_CURVES_SUBGIG_CURVES_NUM_VALUES] =
RAIL_PA_CURVES_SUBGIG_CURVES;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataMpVbat = {
RAIL_PA_CURVES_2P4_MP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_MP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_MP_VBAT_CURVES,
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataLpVbat = {
RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_LP,
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_MP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_MP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataMpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataLpVbat },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_MP_MIN,
.max = RAIL_TX_POWER_LEVEL_MP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataMpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_LP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataLpVbat },
},
}
};
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_4) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_6)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
#if defined(RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = {
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES,
};
#endif
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
#if defined(RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT)
.conversion = { .powerCurve = &RAIL_piecewiseDataHpDcdc },
#else
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
#endif
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#elif !defined(_SILICON_LABS_32B_SERIES_2)
static const int16_t RAIL_curves10dbm[RAIL_PA_CURVES_COMMON_INTERFACE_10DBM_NUM_VALUES] =
RAIL_PA_CURVES_COMMON_INTERFACE_10DBM_CURVES;
static const int16_t RAIL_curves0dbm[RAIL_PA_CURVES_COMMON_INTERFACE_0DBM_NUM_VALUES] =
RAIL_PA_CURVES_COMMON_INTERFACE_0DBM_CURVES;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#else
#error "Unsupported platform!"
#endif
#endif //_SILICON_LABS_MODULE

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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CURVES_EFR32_H
#define PA_CURVES_EFR32_H
#ifdef __cplusplus
extern "C" {
#endif
#include "em_device.h"
#ifdef _SILICON_LABS_32B_SERIES_1
#include "efr32xg1x/sl_rail_util_pa_curves.h"
#elif defined (_SILICON_LABS_32B_SERIES_2_CONFIG_1)
#include "efr32xg21/sl_rail_util_pa_curves.h"
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_2)
#include "efr32xg22/sl_rail_util_pa_curves.h"
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#if defined(_SILICON_LABS_EFR32_SUBGHZ_HP_PA_PRESENT)
#if (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 20)
#include "efr32xg23/sl_rail_util_pa_curves_20dbm.h"
#elif (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 10)
#include "efr32xg23/sl_rail_util_pa_curves_10dbm_434M.h"
#else
#include "efr32xg23/sl_rail_util_pa_curves_14dbm.h"
#endif
#else
#error "No valid PA available for selected chip."
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#if defined(_SILICON_LABS_EFR32_SUBGHZ_HP_PA_PRESENT)
#if (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 20)
#if defined(HARDWARE_BOARD_SUPPORTS_RF_BAND_868)
#include "efr32xg28/sl_rail_util_pa_curves_20dbm_868M.h"
#else
#include "efr32xg28/sl_rail_util_pa_curves_20dbm_915M.h"
#endif
#else
#if defined(HARDWARE_BOARD_SUPPORTS_RF_BAND_868)
#include "efr32xg28/sl_rail_util_pa_curves_14dbm_868M.h"
#else
#include "efr32xg28/sl_rail_util_pa_curves_14dbm_915M.h"
#endif
#endif
#else
#error "No valid PA available for selected chip."
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 4)
#if defined(_SILICON_LABS_EFR32_2G4HZ_HP_PA_PRESENT) \
&& (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM > 10)
#include "efr32xg24/sl_rail_util_pa_curves_20dbm.h"
#else
#include "efr32xg24/sl_rail_util_pa_curves_10dbm.h"
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#include "efr32xg25/sl_rail_util_pa_dbm_powersetting_mapping_table.h"
#include "efr32xg25/sl_rail_util_pa_curves.h"
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 6)
#if defined(_SILICON_LABS_EFR32_2G4HZ_HP_PA_PRESENT) \
&& (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM > 10)
#include "efr32xg26/sl_rail_util_pa_curves_20dbm.h"
#else
#if defined(EFR32MG26B510F3200IL136)
#include "efr32xg26/sl_rail_util_pa_curves_BGA.h"
#else
#include "efr32xg26/sl_rail_util_pa_curves_10dbm.h"
#endif
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 7)
// EFR32XG27 boards come in two different packaging -- CSP and QFN
// These packages have different matching circuits which leads
// to different PA curves.
// CSP packages have _SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM
// = 4 whereas for QFN package it is 6 or 8dBm, so this parameter
// is used to differentiate it.
#if (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM < 6)
#include "efr32xg27/sl_rail_util_pa_curves_CSP.h"
#else
#include "efr32xg27/sl_rail_util_pa_curves_QFN.h"
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)
#include "efr32xg29/sl_rail_util_pa_curves.h"
#elif defined(_SILICON_LABS_32B_SERIES_3)
#include "sixg301/sl_rail_util_pa_dbm_powersetting_mapping_table.h"
#include "sixg301/sl_rail_util_pa_curves.h"
#else
#ifdef RAIL_INTERNAL_BUILD
#include "pa_curves_efr32_internal.h"
#else
#error "Unsupported platform!"
#endif
#endif
#ifdef __cplusplus
}
#endif
#endif // PA_CURVES_EFR32_H

1358
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_38M4Hz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_38M4HZ_H__
#define __SL_RAIL_BLE_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_38M4Hz_0_37_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_38M4HZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_38M4HZ_PHY_BLUETOOTH_2M_38M4HZ_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_38M4HZ_PHY_BLUETOOTH_2M_38M4HZ_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_38M4HZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_38M4HZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_38M4HZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_38M4Hz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_38M4HZ_H__

1359
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_39MHz.c Normal file
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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_39MHz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_39MHZ_H__
#define __SL_RAIL_BLE_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_39MHz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_39MHz_0_37_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_39MHZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_39MHZ_PHY_BLUETOOTH_2M_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_39MHZ_PHY_BLUETOOTH_2M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_39MHZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_39MHZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_39MHZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_39MHz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_39MHZ_H__

1747
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_40MHz.c Normal file
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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_40MHz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_40MHZ_H__
#define __SL_RAIL_BLE_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_40MHz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_cs_0_78_40MHz_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_cs_0_78_40MHz_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_40MHZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_40MHZ_PHY_BLUETOOTH_2M_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_40MHZ_PHY_BLUETOOTH_2M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_40MHZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_40MHZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_CS_40MHZ_PHY_BLUETOOTH_1M_HADM_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_CS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_CS_40MHZ_PHY_BLUETOOTH_2M_HADM_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_CS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_40MHZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_40MHz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_40MHZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_38M4Hz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_38M4Hz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0xf0, 0x49, 0x02, 6, 20, 0, 0, 0x00, 0xe0, 0x93, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x68, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
60000000UL,
2000000UL,
0x00F62004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
60000000UL,
2000000UL,
0x00F82004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
60000000UL,
2000000UL,
0x00F82004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60D000EUL,
/* C05C */ 0x0000002AUL,
/* C060 */ 0x0D0C0B08UL,
/* C064 */ 0x0000000DUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00FF0264UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000008UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8A81B000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x0051BFBBUL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104911UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00FF0264UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000008UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8A81B000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x0051BFBBUL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104911UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x00000740UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x00000740UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_38M4Hz.h Normal file
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@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_38M4HZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_38M4HZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_38M4HZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_38M4HZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_38M4HZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_39MHz.c Normal file
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@@ -0,0 +1,880 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_39MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0xc0, 0x17, 0x53, 0x02, 6, 20, 0, 0, 0x80, 0x2f, 0xa6, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x8a, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
40000000UL,
2000000UL,
0x00F62004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60D000EUL,
/* C05C */ 0x0000002AUL,
/* C060 */ 0x0D0C0B08UL,
/* C064 */ 0x0000000DUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00F00249UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8BC29000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x005254F8UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x001047F1UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00F00249UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8BC29000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x005254F8UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x001047F1UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_39MHz.h Normal file
View File

@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_39MHZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_39MHZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_39MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_39MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_39MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_39MHZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_40MHz.c Normal file
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@@ -0,0 +1,880 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_40MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0x5a, 0x62, 0x02, 6, 20, 0, 0, 0x00, 0xb4, 0xc4, 0x04, 7, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0xc2, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0xc4, 0x09, 0, 0, 0, 0, 0x2c, 0x0b, 1, 4, 4, 4, 0xc4, 0x09, 0, 0, 0, 0, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
40000000UL,
2000000UL,
0x00F62004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60E000FUL,
/* C05C */ 0x0000002DUL,
/* C060 */ 0x0E0D0B08UL,
/* C064 */ 0x0000000EUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00FE027BUL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8BC29000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x005254F3UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104624UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00FE027BUL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8BC29000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x005254F3UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104624UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_40MHz.h Normal file
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@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_40MHZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_40MHZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_40MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_40MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_40MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_40MHZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__

344
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_38M4Hz.c Normal file
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@@ -0,0 +1,344 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_38M4Hz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0xf0, 0x49, 0x02, 6, 20, 0, 0, 0x00, 0xe0, 0x93, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x68, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100444UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6DF00F0UL,
/* C05C */ 0x00005355UL,
/* C060 */ 0xD8CCB484UL,
/* C064 */ 0x000000DFUL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067080UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031DUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503358UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100444UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_38M4Hz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};

48
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_38M4Hz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_38M4HZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_38M4Hz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__

344
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_39MHz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_39MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0xc0, 0x17, 0x53, 0x02, 6, 20, 0, 0, 0x80, 0x2f, 0xa6, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x8a, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100433UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6E300F4UL,
/* C05C */ 0x000054A3UL,
/* C060 */ 0xDCCFB786UL,
/* C064 */ 0x000000E3UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067242UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031CUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503356UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100433UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_39MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_39MHz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};

48
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_39MHz.h Normal file
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@@ -0,0 +1,48 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_39MHz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_39MHZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_39MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_39MHz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__

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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_40MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0x5a, 0x62, 0x02, 6, 20, 0, 0, 0x00, 0xb4, 0xc4, 0x04, 7, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0xc2, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0xc4, 0x09, 0, 0, 0, 0, 0x2c, 0x0b, 1, 4, 4, 4, 0xc4, 0x09, 0, 0, 0, 0, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100418UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6E900FAUL,
/* C05C */ 0x000056CEUL,
/* C060 */ 0xE1D5BC8AUL,
/* C064 */ 0x000000E9UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067530UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031CUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503354UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100418UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_40MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_40MHz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};

48
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_40MHz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_40MHZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_40MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_40MHz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__

355
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/***************************************************************************//**
* @file sl_rail_phy_overrides.c
* @brief Applies PHY overrides based on a device's HFXO frequency.
*******************************************************************************
* # License
* <b>Copyright 2024 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifdef SL_COMPONENT_CATALOG_PRESENT
#include "sl_component_catalog.h"
#endif // SL_COMPONENT_CATALOG_PRESENT
#if defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_clock_manager_oscillator_config.h"
#define SL_RAIL_PHY_INIT_HFXO_FREQ SL_CLOCK_MANAGER_HFXO_FREQ
#else // !defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_device_init_hfxo_config.h"
#define SL_RAIL_PHY_INIT_HFXO_FREQ SL_DEVICE_INIT_HFXO_FREQ
#endif // defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_rail_ble_config_38M4Hz.h"
#include "sl_rail_ieee802154_config_38M4Hz.h"
#include "sl_rail_rfsense_ook_config_38M4Hz.h"
#include "sl_rail_ble_config_39MHz.h"
#include "sl_rail_ieee802154_config_39MHz.h"
#include "sl_rail_rfsense_ook_config_39MHz.h"
#include "sl_rail_ble_config_40MHz.h"
#include "sl_rail_ieee802154_config_40MHz.h"
#include "sl_rail_rfsense_ook_config_40MHz.h"
#if SL_RAIL_PHY_INIT_HFXO_FREQ == 38400000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_38M4Hz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs = NULL;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs = NULL;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_38M4Hz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_38M4Hz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_38M4Hz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_38M4Hz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_38M4Hz_channelConfig;
#elif SL_RAIL_PHY_INIT_HFXO_FREQ == 39000000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_39MHz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_39MHz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs = NULL;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs = NULL;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_39MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_39MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_39MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_39MHz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_39MHz_channelConfig;
#elif SL_RAIL_PHY_INIT_HFXO_FREQ == 40000000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_40MHz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_40MHz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs =
&sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs =
&sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_40MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_40MHz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_40MHz_channelConfig;
#endif // SL_RAIL_PHY_INIT_HFXO_FREQ

39
Libs/platform/radio/rail_lib/plugin/rail_util_power_manager_init/sl_rail_util_power_manager_init.c Normal file
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/***************************************************************************//**
* @file
* @brief Initialize RAIL power manager
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "rail.h"
#include "sl_rail_util_power_manager_init.h"
#include "sl_rail_util_power_manager_init_config.h"
void sl_rail_util_power_manager_init(void)
{
#if SL_RAIL_UTIL_RAIL_POWER_MANAGER_INIT == 1
RAIL_InitPowerManager();
#endif
}

50
Libs/platform/radio/rail_lib/plugin/rail_util_power_manager_init/sl_rail_util_power_manager_init.h Normal file
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/***************************************************************************//**
* @file
* @brief Initialize RAIL power manager
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_POWER_MANAGER_INIT_H
#define SL_RAIL_UTIL_POWER_MANAGER_INIT_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize RAIL power manager
*
* @note: This function should be called during application initialization,
* after sl_power_manager_init function has been called.
*/
void sl_rail_util_power_manager_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_POWER_MANAGER_INIT_H

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Libs/platform/radio/rail_lib/plugin/rail_util_pti/sl_rail_util_pti.c Normal file
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/***************************************************************************//**
* @file
* @brief Packet Trace Information
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_gpio.h"
#include "rail.h"
#include "sl_rail_util_pti.h"
#include "sl_rail_util_pti_config.h"
void sl_rail_util_pti_init(void)
{
RAIL_PtiConfig_t railPtiConfig = {
.mode = SL_RAIL_UTIL_PTI_MODE,
.baud = SL_RAIL_UTIL_PTI_BAUD_RATE_HZ,
#if defined(SL_RAIL_UTIL_PTI_DOUT_PORT) && defined(SL_RAIL_UTIL_PTI_DOUT_PIN)
.doutPort = (uint8_t)SL_RAIL_UTIL_PTI_DOUT_PORT,
.doutPin = SL_RAIL_UTIL_PTI_DOUT_PIN,
#ifdef SL_RAIL_UTIL_PTI_DOUT_LOC
.doutLoc = SL_RAIL_UTIL_PTI_DOUT_LOC,
#endif // SL_RAIL_UTIL_PTI_DOUT_LOC
#endif // dout support
#if defined(SL_RAIL_UTIL_PTI_DCLK_PORT) && defined(SL_RAIL_UTIL_PTI_DCLK_PIN)
.dclkPort = (uint8_t)SL_RAIL_UTIL_PTI_DCLK_PORT,
.dclkPin = SL_RAIL_UTIL_PTI_DCLK_PIN,
#ifdef SL_RAIL_UTIL_PTI_DCLK_LOC
.dclkLoc = SL_RAIL_UTIL_PTI_DCLK_LOC,
#endif // SL_RAIL_UTIL_PTI_DCLK_LOC
#endif // dclk support
#if defined(SL_RAIL_UTIL_PTI_DFRAME_PORT) && defined(SL_RAIL_UTIL_PTI_DFRAME_PIN)
.dframePort = (uint8_t)SL_RAIL_UTIL_PTI_DFRAME_PORT,
.dframePin = SL_RAIL_UTIL_PTI_DFRAME_PIN,
#ifdef SL_RAIL_UTIL_PTI_DFRAME_LOC
.dframeLoc = SL_RAIL_UTIL_PTI_DFRAME_LOC,
#endif // SL_RAIL_UTIL_PTI_DFRAME_LOC
#endif // dframe support
};
RAIL_ConfigPti(RAIL_EFR32_HANDLE, &railPtiConfig);
}

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Libs/platform/radio/rail_lib/plugin/rail_util_pti/sl_rail_util_pti.h Normal file
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/***************************************************************************//**
* @file
* @brief Packet Trace Information initialization and usage
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_PTI_H
#define SL_RAIL_UTIL_PTI_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize the RAIL PTI Utility.
*
* @note: This function should be called during application initialization.
*/
void sl_rail_util_pti_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_PTI_H

38
Libs/platform/radio/rail_lib/plugin/rail_util_rssi/sl_rail_util_rssi.c Normal file
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/***************************************************************************//**
* @file
* @brief Default RSSI setup
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "rail.h"
#include "sl_rail_util_rssi.h"
#include "sl_rail_util_rssi_config.h"
void sl_rail_util_rssi_init(void)
{
(void)RAIL_SetRssiOffset(RAIL_EFR32_HANDLE, (int8_t)SL_RAIL_UTIL_RSSI_OFFSET);
}

50
Libs/platform/radio/rail_lib/plugin/rail_util_rssi/sl_rail_util_rssi.h Normal file
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/***************************************************************************//**
* @file
* @brief Default RSSI setup
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_RSSI_H
#define SL_RAIL_UTIL_RSSI_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize the default RSSI.
*
* @note: This function should be called during application initialization
* before \ref RAIL_Init has been called.
*/
void sl_rail_util_rssi_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_RSSI_H

45
Libs/platform/radio/rail_lib/plugin/rail_util_sequencer/sl_rail_util_sequencer.c Normal file
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/***************************************************************************//**
* @file
* @brief
*******************************************************************************
* # License
* <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "sl_rail_util_sequencer_config.h"
#include "rail.h"
#if !SL_RAIL_UTIL_SEQUENCER_RUNTIME_IMAGE_SELECTION \
&& defined(SL_RAIL_UTIL_SEQUENCER_IMAGE)
RAIL_Status_t RAILCb_RadioSequencerImageLoad(void)
{
#if SL_RAIL_UTIL_SEQUENCER_IMAGE == RAIL_SEQ_IMAGE_1
return RAIL_LoadSequencerImage1(RAIL_EFR32_HANDLE);
#elif SL_RAIL_UTIL_SEQUENCER_IMAGE == RAIL_SEQ_IMAGE_2
return RAIL_LoadSequencerImage2(RAIL_EFR32_HANDLE);
#else
#error "Must choose a valid sequencer image!"
#endif
}
#endif

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Libs/platform/radio/rail_lib/protocol/sidewalk/rail_sidewalk.h Normal file
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/***************************************************************************//**
* @file
* @brief The Sidewalk specific header file for the RAIL library.
*******************************************************************************
* # License
* <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef RAIL_SIDEWALK_H
#define RAIL_SIDEWALK_H
#ifdef __cplusplus
extern "C" {
#endif
// Get the standard include types
#include <stdint.h>
#include <stdbool.h>
// Get the RAIL specific structures and types
#include "rail_types.h"
/// @addtogroup SIDEWALK_PHY Sidewalk Radio Configurations
/// @ingroup Protocol_Specific
/// Radio configurations for the RAIL Sidewalk Accelerator
///
/// These radio configurations are used to configure Sidewalk when a function
/// such as \ref RAIL_Sidewalk_ConfigPhy2GFSK50kbps() is called. Each radio
/// configuration listed below is compiled into the RAIL library as a weak
/// symbol that will take into account per-die defaults. If the board
/// configuration in use has different settings than the default, such as a
/// different radio subsystem clock frequency, these radio configurations can
/// be overriden to account for those settings.
/// @{
/**
* Default PHY to use for Sidewalk 2GFSK 50kbps. Will be NULL if
* \ref RAIL_SUPPORTS_PROTOCOL_SIDEWALK is 0.
*/
extern const RAIL_ChannelConfig_t *const RAIL_Sidewalk_Phy2GFSK50kbps;
/**
* Switch to the 2GFSK 50 kbps Sidewalk PHY.
*
* @param[in] railHandle A handle for RAIL instance.
* @return Status code indicating success of the function call.
*
* Use this function to switch to the 2GFSK 50 kbps Sidewalk PHY.
*
* @note The Sidewalk PHY is supported only on some parts.
* The preprocessor symbol \ref RAIL_SUPPORTS_PROTOCOL_SIDEWALK and the
* runtime function \ref RAIL_SupportsProtocolSidewalk() may be used to
* test for support of the Sidewalk PHY.
*/
RAIL_Status_t RAIL_Sidewalk_ConfigPhy2GFSK50kbps(RAIL_Handle_t railHandle);
/// @} // End of group SIDEWALK_PHY
#ifdef __cplusplus
}
#endif
#endif // RAIL_SIDEWALK_H

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/***************************************************************************//**
* @file
* @brief The WMBUS specific header file for the RAIL library.
*******************************************************************************
* # License
* <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_WMBUS_H__
#define __RAIL_WMBUS_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// @addtogroup WMBUS Wireless M-Bus
/// @ingroup Protocol_Specific
/// @brief Wireless M-Bus (WMBUS) configuration
/// @{
/**
* @enum RAIL_WMBUS_Phy_t
* @brief The RX variant of the WMBUS T+C PHY.
*/
RAIL_ENUM(RAIL_WMBUS_Phy_t) {
/** \ref RAIL_RxPacketDetails_t::subPhyId indicating a mode T frame A packet */
RAIL_WMBUS_ModeTFrameA = 0U,
/** \ref RAIL_RxPacketDetails_t::subPhyId indicating a mode C frame A packet */
RAIL_WMBUS_ModeCFrameA = 2U,
/** \ref RAIL_RxPacketDetails_t::subPhyId indicating a mode C frame B packet */
RAIL_WMBUS_ModeCFrameB = 3U,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_WMBUS_ModeTFrameA ((RAIL_WMBUS_Phy_t) RAIL_WMBUS_ModeTFrameA)
#define RAIL_WMBUS_ModeCFrameA ((RAIL_WMBUS_Phy_t) RAIL_WMBUS_ModeCFrameA)
#define RAIL_WMBUS_ModeCFrameB ((RAIL_WMBUS_Phy_t) RAIL_WMBUS_ModeCFrameB)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* Configure WMBUS simultaneous M2O RX of T and C modes feature.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] enableSimultaneousTCRx true to enable WMBUS simultaneous M2O RX of T and C modes.
* @return Status code indicating success of the function call.
*
* If simultaneous M2O RX of T and C modes is enabled, when
* PHY_wMbus_ModeTC_M2O_100k_frameA is loaded, mode T Frame A and mode C frame
* A/B can be received. The mode and frame type of the last received packet is
* available in \ref RAIL_RxPacketDetails_t::subPhyId.
*
* @note This WMBUS feature is supported only on some parts.
* The preprocessor symbol \ref RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX and the
* runtime function \ref RAIL_WMBUS_SupportsSimultaneousTCRx() may be used to
* test for support.
*/
RAIL_Status_t RAIL_WMBUS_Config(RAIL_Handle_t railHandle,
bool enableSimultaneousTCRx);
/// @} // End of group WMBUS
#ifdef __cplusplus
}
#endif
#endif // __RAIL_WMBUS_H__

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/***************************************************************************//**
* @file
* @brief The Z-Wave specific header file for the RAIL library.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_ZWAVE_H__
#define __RAIL_ZWAVE_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// @addtogroup Z_Wave Z-Wave
/// @ingroup Protocol_Specific
/// @brief Z-Wave configuration routines
///
/// The functions in this group configure RAIL Z-Wave hardware
/// acceleration features.
///
/// To configure Z-Wave functionality, the application must first set up
/// a RAIL instance with \ref RAIL_Init() and other setup functions.
/// @code{.c}
/// RAIL_ZWAVE_NodeId_t gRecentBeamNodeId;
/// uint8_t gRecentBeamChannelIndex;
///
/// // Main RAIL_EVENT callback
/// static void RAILCb_Event(RAIL_Handle_t railHandle, RAIL_Events_t events)
/// {
/// // Get beam Node Id and channel index from beam packet
/// if (events & RAIL_EVENT_ZWAVE_BEAM) {
/// if (RAIL_ZWAVE_IsEnabled(railHandle)) {
/// if ((RAIL_ZWAVE_GetBeamNodeId(railHandle, &gRecentBeamNodeId)
/// != RAIL_STATUS_NO_ERROR)
/// || (RAIL_ZWAVE_GetBeamChannelIndex(railHandle, &gRecentBeamChannelIndex)
/// != RAIL_STATUS_NO_ERROR)) {
/// return;
/// }
/// }
/// }
/// }
///
/// static const RAIL_ZWAVE_Config_t zwaveConfig = {
/// .options = RAIL_ZWAVE_OPTIONS_DEFAULT
/// };
///
/// RAIL_Status_t zwaveInit(void)
/// {
/// // initialize Z-Wave
/// RAIL_Status_t status = RAIL_ZWAVE_Init(railHandle, &zwaveConfig);
///
/// if (status != RAIL_STATUS_NO_ERROR) {
/// return status;
/// }
///
/// uint8_t myHomeId[4] = { 0xDE, 0xAD, 0xBE, 0xEF };
/// RAIL_ZWAVE_SetNodeId(railHandle, RAIL_ZWAVE_NODE_ID_DEFAULT);
/// RAIL_ZWAVE_SetHomeId(railHandle, myHomeId, RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE);
///
/// // configure region to EU(European Union)
/// return RAIL_ZWAVE_ConfigRegion(railHandle, RAIL_ZWAVE_REGION_EU);
/// }
/// @endcode
///
/// @{
/**
* @enum RAIL_ZWAVE_Options_t
* @brief Z-Wave options.
*/
RAIL_ENUM_GENERIC(RAIL_ZWAVE_Options_t, uint32_t) {
/** Shift position of \ref RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE bit. */
RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE_SHIFT = 0,
/** Shift position of \ref RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES bit. */
RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES_SHIFT = 1,
/** Shift position of \ref RAIL_ZWAVE_OPTION_NODE_ID_FILTERING bit. */
RAIL_ZWAVE_OPTION_NODE_ID_FILTERING_SHIFT = 2,
/** Shift position of \ref RAIL_ZWAVE_OPTION_PROMISCUOUS_BEAM_MODE bit. */
RAIL_ZWAVE_OPTION_PROMISCUOUS_BEAM_MODE_SHIFT = 3,
};
/** A value representing no options */
#define RAIL_ZWAVE_OPTIONS_NONE 0U
/** All options are disabled by default. */
#define RAIL_ZWAVE_OPTIONS_DEFAULT RAIL_ZWAVE_OPTIONS_NONE
/**
* An option to configure promiscuous mode, accepting non-beam packets
* regardless of their Home Id. By default packets are filtered by their Home Id.
* When true, such filtering is disabled.
*/
#define RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE \
(1u << RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE_SHIFT)
/**
* An option to filter non-beam packets based on their Node Id when
* \ref RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE is disabled.
*
* @note This option has no effect when
* \ref RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE is enabled.
*/
#define RAIL_ZWAVE_OPTION_NODE_ID_FILTERING \
(1u << RAIL_ZWAVE_OPTION_NODE_ID_FILTERING_SHIFT)
/**
* An option to configure beam frame recognition. By default beams are not
* considered special and will be received as if they were normal Z-Wave
* frames, assuredly triggering \ref RAIL_EVENT_RX_FRAME_ERROR.
* When true, beam frames that are broadcast or match the Node Id and
* Home Id hash values will trigger \ref RAIL_EVENT_ZWAVE_BEAM event.
* (All beams additionally trigger \ref RAIL_EVENT_RX_PACKET_ABORTED
* regardless of Node Id / Home Id hash values.)
*
* @note This option takes precedence over \ref
* RAIL_ZWAVE_OPTION_PROMISCUOUS_MODE when receiving a beam frame.
* For promiscuous beam handling see related
* \ref RAIL_ZWAVE_OPTION_PROMISCUOUS_BEAM_MODE option.
*/
#define RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES \
(1u << RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES_SHIFT)
/**
* An option to receive all beams promiscuously when \ref
* RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES is enabled.
* When true, beam frames are received regardless of their Node Id or Home Id hash
* resulting in \ref RAIL_EVENT_ZWAVE_BEAM (and also \ref
* RAIL_EVENT_RX_PACKET_ABORTED) for each beam frame.
*
* @note This option has no effect when
* \ref RAIL_ZWAVE_OPTION_DETECT_BEAM_FRAMES is disabled.
*/
#define RAIL_ZWAVE_OPTION_PROMISCUOUS_BEAM_MODE \
(1u << RAIL_ZWAVE_OPTION_PROMISCUOUS_BEAM_MODE_SHIFT)
/** A value representing all options */
#define RAIL_ZWAVE_OPTIONS_ALL 0xFFFFFFFFU
/**
* @enum RAIL_ZWAVE_NodeId_t
* @brief A Z-Wave Node Id.
*
* This data type is 12 bits wide when using the ZWave Long Range PHY, and
* 8 bits wide otherwise.
*
* @note When using the Long Range PHY, values 0xFA1..0xFFE are reserved.
* Otherwise, values 0xE9..0xFE are reserved.
*/
RAIL_ENUM_GENERIC(RAIL_ZWAVE_NodeId_t, uint16_t) {
/** The unknown Node Id for uninitialized nodes. */
RAIL_ZWAVE_NODE_ID_NONE = 0x00U,
/** The broadcast Node Id. */
RAIL_ZWAVE_NODE_ID_BROADCAST = 0xFFU,
/** Default to the broadcast Node Id. */
RAIL_ZWAVE_NODE_ID_DEFAULT = RAIL_ZWAVE_NODE_ID_BROADCAST,
// All other values between 0x00 and 0xFE are valid Node Ids normally
/** The Long Range broadcast Node Id. */
RAIL_ZWAVE_NODE_ID_BROADCAST_LONGRANGE = 0xFFFU,
/** Default to the Long Range broadcast Node Id. */
RAIL_ZWAVE_NODE_ID_DEFAULT_LONGRANGE = RAIL_ZWAVE_NODE_ID_BROADCAST_LONGRANGE,
// All values from 0x001 to 0xFA1 are valid Node Ids with a Long Range PHY.
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ZWAVE_NODE_ID_NONE ((RAIL_ZWAVE_NodeId_t) RAIL_ZWAVE_NODE_ID_NONE)
#define RAIL_ZWAVE_NODE_ID_BROADCAST ((RAIL_ZWAVE_NodeId_t) RAIL_ZWAVE_NODE_ID_BROADCAST)
#define RAIL_ZWAVE_NODE_ID_DEFAULT ((RAIL_ZWAVE_NodeId_t) RAIL_ZWAVE_NODE_ID_DEFAULT)
#define RAIL_ZWAVE_NODE_ID_BROADCAST_LONGRANGE ((RAIL_ZWAVE_NodeId_t) RAIL_ZWAVE_NODE_ID_BROADCAST_LONGRANGE)
#define RAIL_ZWAVE_NODE_ID_DEFAULT_LONGRANGE ((RAIL_ZWAVE_NodeId_t) RAIL_ZWAVE_NODE_ID_DEFAULT_LONGRANGE)
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/** Defines for \ref RAIL_RxPacketDetails_t::subPhyId field. */
#define RAIL_ZWAVE_RX_SUBPHY_ID_0 (0U)
#define RAIL_ZWAVE_RX_SUBPHY_ID_1 (1U)
#define RAIL_ZWAVE_RX_SUBPHY_ID_2 (2U)
#define RAIL_ZWAVE_RX_SUBPHY_ID_3 (3U)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* @enum RAIL_ZWAVE_HomeId_t
* @brief A Z-Wave Home Id.
*
* @note Home Ids in the range 0x54000000..0x55FFFFFF are illegal.
*/
RAIL_ENUM_GENERIC(RAIL_ZWAVE_HomeId_t, uint32_t) {
/** The unknown Home Id. */
RAIL_ZWAVE_HOME_ID_UNKNOWN = 0x00000000U,
/** An impossible and unlikely Home Id. */
RAIL_ZWAVE_HOME_ID_DEFAULT = 0x54545454U,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ZWAVE_HOME_ID_UNKNOWN ((RAIL_ZWAVE_HomeId_t) RAIL_ZWAVE_HOME_ID_UNKNOWN)
#define RAIL_ZWAVE_HOME_ID_DEFAULT ((RAIL_ZWAVE_HomeId_t) RAIL_ZWAVE_HOME_ID_DEFAULT)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* @enum RAIL_ZWAVE_HomeIdHash_t
* @brief A Z-Wave Home Id hash.
*
* @note Certain values (as shown) are illegal.
*/
RAIL_ENUM(RAIL_ZWAVE_HomeIdHash_t) {
/** An illegal Home Id hash value. */
RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_1 = 0x0AU,
/** An illegal Home Id hash value. */
RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_2 = 0x4AU,
/** An illegal Home Id hash value. */
RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_3 = 0x55U,
/**
* Illegal Home Id hash value that suppresses checking the
* Home Id hash field of beam packets.
*/
RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE = 0x55U,
/** Default to don't care. */
RAIL_ZWAVE_HOME_ID_HASH_DEFAULT = RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_1 ((RAIL_ZWAVE_HomeIdHash_t) RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_1)
#define RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_2 ((RAIL_ZWAVE_HomeIdHash_t) RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_2)
#define RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_3 ((RAIL_ZWAVE_HomeIdHash_t) RAIL_ZWAVE_HOME_ID_HASH_ILLEGAL_3)
#define RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE ((RAIL_ZWAVE_HomeIdHash_t) RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE)
#define RAIL_ZWAVE_HOME_ID_HASH_DEFAULT ((RAIL_ZWAVE_HomeIdHash_t) RAIL_ZWAVE_HOME_ID_HASH_DEFAULT)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* @struct RAIL_ZWAVE_Config_t
* @brief A configuration structure for Z-Wave in RAIL.
*/
typedef struct RAIL_ZWAVE_Config {
/**
* Defines Z-Wave options.
*/
RAIL_ZWAVE_Options_t options;
/**
* Defines Z-Wave Acking configuration.
*/
RAIL_AutoAckConfig_t ackConfig;
/**
* Defines state timings for Z-Wave.
*/
RAIL_StateTiming_t timings;
} RAIL_ZWAVE_Config_t;
/**
* @enum RAIL_ZWAVE_Baud_t
* @brief Z-Wave supported baud rates or PHYs.
*/
RAIL_ENUM(RAIL_ZWAVE_Baud_t) {
/** 9.6 kbps baud rate. */
RAIL_ZWAVE_BAUD_9600,
/** 40 kbps baud rate. */
RAIL_ZWAVE_BAUD_40K,
/** 100 kbps baud rate. */
RAIL_ZWAVE_BAUD_100K,
/** Long Range PHY. */
RAIL_ZWAVE_LR,
/** Energy detection PHY. */
RAIL_ZWAVE_ENERGY_DETECT = RAIL_ZWAVE_LR,
/** Sentinel value for invalid baud rate. Must be last. */
RAIL_ZWAVE_BAUD_INVALID
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ZWAVE_BAUD_9600 ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_BAUD_9600)
#define RAIL_ZWAVE_BAUD_40K ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_BAUD_40K)
#define RAIL_ZWAVE_BAUD_100K ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_BAUD_100K)
#define RAIL_ZWAVE_LR ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_LR)
#define RAIL_ZWAVE_ENERGY_DETECT ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_ENERGY_DETECT)
#define RAIL_ZWAVE_INVALID ((RAIL_ZWAVE_Baud_t) RAIL_ZWAVE_INVALID)
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/**
* @enum RAIL_ZWAVE_RegionOptions_t
* @brief Region Specific Physical
*/
RAIL_ENUM(RAIL_ZWAVE_RegionOptions_t) {
/** Bit shift for US Long Range 3 */
RAIL_ZWAVE_REGION_LONG_RANGE_3_SHIFT = 0,
/** Bit shift for special low side config, mostly for Japan and Korea */
RAIL_ZWAVE_REGION_LOW_SIDE_SHIFT = 1,
/** Bit shift for US long range range configurations */
RAIL_ZWAVE_REGION_LONG_RANGE_SHIFT = 2,
};
/**
* RAIL_ZWAVE_RegionOptions_t bitmasks
*/
/** A value representing US Long Range regions */
#define RAIL_ZWAVE_REGION_LONG_RANGE_MASK (1u << RAIL_ZWAVE_REGION_LONG_RANGE_SHIFT)
/** A value representing lowside configurations: JP and KR */
#define RAIL_ZWAVE_REGION_LOW_SIDE_MASK (1u << RAIL_ZWAVE_REGION_LOW_SIDE_SHIFT)
/** A value representing Long Range 3 (end device) region */
#define RAIL_ZWAVE_REGION_LONG_RANGE_3_MASK (1u << RAIL_ZWAVE_REGION_LONG_RANGE_3_SHIFT)
/** @deprecated Backwards compatible name. */
#define RAIL_ZWAVE_REGION_LONG_RANGE_END_MASK RAIL_ZWAVE_REGION_LONG_RANGE_3_MASK
/** A value representing No bit to be enabled */
#define RAIL_ZWAVE_REGION_SPECIFIC_NONE 0u
#endif // DOXYGEN SHOULD SKIP THIS
/**
* Sentinel value to indicate that a channel (and thus its frequency)
* are invalid.
*/
#define RAIL_ZWAVE_FREQ_INVALID 0xFFFFFFFFUL
/**
* @enum RAIL_ZWAVE_RegionId_t
* @brief Z-Wave region identifications.
*/
RAIL_ENUM(RAIL_ZWAVE_RegionId_t) {
/** Unknown/Invalid. */
RAIL_ZWAVE_REGIONID_UNKNOWN = 0,
/** European Union. */
RAIL_ZWAVE_REGIONID_EU = 1,
/** United States. */
RAIL_ZWAVE_REGIONID_US = 2,
/** Australia/New Zealand. */
RAIL_ZWAVE_REGIONID_ANZ = 3,
/** Hong Kong. */
RAIL_ZWAVE_REGIONID_HK = 4,
/** Malaysia. */
RAIL_ZWAVE_REGIONID_MY = 5,
/** India. */
RAIL_ZWAVE_REGIONID_IN = 6,
/** Japan. */
RAIL_ZWAVE_REGIONID_JP = 7,
/** Russian Federation. */
RAIL_ZWAVE_REGIONID_RU = 8,
/** Israel. */
RAIL_ZWAVE_REGIONID_IL = 9,
/** Korea. */
RAIL_ZWAVE_REGIONID_KR = 10,
/** China. */
RAIL_ZWAVE_REGIONID_CN = 11,
/** United States, with first long range PHY. */
RAIL_ZWAVE_REGIONID_US_LR1 = 12,
/** United States, with second long range PHY. */
RAIL_ZWAVE_REGIONID_US_LR2 = 13,
/** United States, with third long range PHY. */
RAIL_ZWAVE_REGIONID_US_LR3 = 14,
/** @deprecated Backwards compatible name. */
RAIL_ZWAVE_REGIONID_US_LR_END_DEVICE = RAIL_ZWAVE_REGIONID_US_LR3,
/** European Union, with first long range PHY. */
RAIL_ZWAVE_REGIONID_EU_LR1 = 15,
/** European Union, with second long range PHY. */
RAIL_ZWAVE_REGIONID_EU_LR2 = 16,
/** European Union, with third long range PHY. */
RAIL_ZWAVE_REGIONID_EU_LR3 = 17,
/** @deprecated Backwards compatible name. */
RAIL_ZWAVE_REGIONID_EU_LR_END_DEVICE = RAIL_ZWAVE_REGIONID_EU_LR3,
/** Count of known regions. Must be last. */
RAIL_ZWAVE_REGIONID_COUNT
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ZWAVE_REGIONID_UNKNOWN ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_UNKNOWN)
#define RAIL_ZWAVE_REGIONID_EU ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_EU)
#define RAIL_ZWAVE_REGIONID_US ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_US)
#define RAIL_ZWAVE_REGIONID_ANZ ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_ANZ)
#define RAIL_ZWAVE_REGIONID_HK ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_HK)
#define RAIL_ZWAVE_REGIONID_MY ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_MY)
#define RAIL_ZWAVE_REGIONID_IN ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_IN)
#define RAIL_ZWAVE_REGIONID_JP ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_JP)
#define RAIL_ZWAVE_REGIONID_RU ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_RU)
#define RAIL_ZWAVE_REGIONID_IL ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_IL)
#define RAIL_ZWAVE_REGIONID_KR ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_KR)
#define RAIL_ZWAVE_REGIONID_CN ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_CN)
#define RAIL_ZWAVE_REGIONID_US_LR1 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_US_LR1)
#define RAIL_ZWAVE_REGIONID_US_LR2 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_US_LR2)
#define RAIL_ZWAVE_REGIONID_US_LR3 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_US_LR3)
#define RAIL_ZWAVE_REGIONID_US_LR_END_DEVICE ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_US_LR_END_DEVICE)
#define RAIL_ZWAVE_REGIONID_EU_LR1 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_EU_LR1)
#define RAIL_ZWAVE_REGIONID_EU_LR2 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_EU_LR2)
#define RAIL_ZWAVE_REGIONID_EU_LR3 ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_EU_LR3)
#define RAIL_ZWAVE_REGIONID_EU_LR_END_DEVICE ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_EU_LR_END_DEVICE)
#define RAIL_ZWAVE_REGIONID_COUNT ((RAIL_ZWAVE_RegionId_t) RAIL_ZWAVE_REGIONID_COUNT)
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Largest Ack timeout period based on
// aPhyTurnaroundTimeRxTx (1 ms max)+ (aMacTransferAckTimeTX (168 bits)* (1/data rate))
// For slowest Data Rate R1 (19.6 kbit/s)
#define RAIL_ZWAVE_MAX_ACK_TIMEOUT_US (9600U)
// Defines for Transition timing
#define RAIL_ZWAVE_TIME_IDLE_TO_RX_US (100U)
#define RAIL_ZWAVE_TIME_TX_TO_RX_US (0U)
#define RAIL_ZWAVE_TIME_IDLE_TO_TX_US (0U)
#define RAIL_ZWAVE_TIME_RX_TO_TX_US (1000U)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* Invalid beam TX power value returned when \ref RAIL_ZWAVE_GetLrBeamTxPower()
* is called after receiving a regular non-long-range beam.
*/
#define RAIL_ZWAVE_LR_BEAM_TX_POWER_INVALID (0xFFU)
/**
* @struct RAIL_ZWAVE_LrAckData_t
* @brief Configuration structure for Z-Wave Long Range Ack.
*/
typedef struct RAIL_ZWAVE_LrAckData {
/// Radio noise level measured on the channel the frame is transmitted on.
int8_t noiseFloorDbm;
/// Transmit power used to transmit the ongoing Z-Wave Long Range Ack.
int8_t txPowerDbm;
/// Signal strength measured while receiving the Z-Wave Long Range frame.
int8_t receiveRssiDbm;
} RAIL_ZWAVE_LrAckData_t;
/**
* @struct RAIL_ZWAVE_BeamRxConfig_t
* @brief Configuration structure for Z-Wave beam detection.
*
* @warning This structure should not be used without direct instruction
* by Silicon Labs. Appropriate defaults for this are built into
* the RAIL library.
*/
typedef struct RAIL_ZWAVE_BeamRxConfig {
/// Channel hopping pattern to use for beam detection.
RAIL_RxChannelHoppingConfig_t channelHoppingConfig;
/// Amount of time to spend trying to receive a beam once detected.
/// 100kbps only
RAIL_RxDutyCycleConfig_t receiveConfig_100;
/// Amount of time to spend trying to receive a beam once detected.
/// 40kbps only
RAIL_RxDutyCycleConfig_t receiveConfig_40;
} RAIL_ZWAVE_BeamRxConfig_t;
/**
* Number of channels in each of Z-Wave's region-based PHYs.
*/
#define RAIL_NUM_ZWAVE_CHANNELS (4U)
/**
* @struct RAIL_ZWAVE_RegionConfig_t
* @brief Each Z-Wave region supports 3 channels.
*/
typedef struct RAIL_ZWAVE_RegionConfig {
/** Channel frequency in hertz. */
uint32_t frequency[RAIL_NUM_ZWAVE_CHANNELS];
/** The maximum power allowed on the channel, in dBm. */
RAIL_TxPower_t maxPower[RAIL_NUM_ZWAVE_CHANNELS];
/** Channel baud rate index. */
RAIL_ZWAVE_Baud_t baudRate[RAIL_NUM_ZWAVE_CHANNELS];
/** Identification number for the region. */
RAIL_ZWAVE_RegionId_t regionId;
/** Encapsulates region-specific options. */
RAIL_ZWAVE_RegionOptions_t regionSpecific;
} RAIL_ZWAVE_RegionConfig_t;
/**
* @struct RAIL_ZWAVE_IrcalVal_t
* @brief Structure for Z-Wave Image Rejection Calibration.
*
* @note Index 0 will hold the low side image rejection calibration value (channel 0),
* while index 1 will hold the high side image rejection value (channel 1).
*/
typedef struct RAIL_ZWAVE_IrcalVal {
/** Low side and high side image rejection values. */
RAIL_IrCalValues_t imageRejection[2];
} RAIL_ZWAVE_IrcalVal_t;
/**
* @typedef RAIL_RxChannelHoppingParameters_t
* @brief Rx channel hopping on-channel time for all Z-Wave channels in a region
*/
typedef RAIL_RxChannelHoppingParameter_t RAIL_RxChannelHoppingParameters_t[RAIL_NUM_ZWAVE_CHANNELS];
/**
* Switch the Z-Wave region.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] regionCfg A pointer to a Z-Wave channel configuration for the selected region.
* @return Status code indicating success of the function call.
*
* @note Setting a new Z-Wave Region will default any Low Power values to
* Normal Power values for the region.
* Z-Wave Region configuration must always be followed by a Low Power setup
* in case one desires to have the Low Power Acking functionality.
*/
RAIL_Status_t RAIL_ZWAVE_ConfigRegion(RAIL_Handle_t railHandle,
const RAIL_ZWAVE_RegionConfig_t *regionCfg);
/**
* Perform image rejection calibration on all valid channels of a
* Z-Wave region.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in,out] pIrCalVals An application-provided pointer of
* type \ref RAIL_ZWAVE_IrcalVal_t. This is populated with image rejection
* calibration values, if not NULL or initialized with
* \ref RAIL_CAL_INVALID_VALUE or if forceIrcal is true.
* @param[in] forceIrcal If true, will always perform image rejection calibration
* and not use previously cached values.
* @return Status code indicating success of the function call.
*
* @note This function also calibrates for beam detection and should be
* called before \ref RAIL_ZWAVE_ReceiveBeam() and after the Z-Wave region
* has been configured via \ref RAIL_ZWAVE_ConfigRegion().
* Channel hopping must be disabled otherwise this function will return
* \ref RAIL_STATUS_INVALID_CALL.
*/
RAIL_Status_t RAIL_ZWAVE_PerformIrcal(RAIL_Handle_t railHandle,
RAIL_ZWAVE_IrcalVal_t *pIrCalVals,
bool forceIrcal);
/**
* Initialize RAIL for Z-Wave features.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] config A pointer to a Z-Wave configuration structure.
* @return Status code indicating success of the function call.
*
* This function is the entry point for working with Z-Wave within
* RAIL. It sets up relevant hardware acceleration for Z-Wave-specific
* features, such as Home Id filtering and beam packets (as
* specified in the configuration) and allows users to select the
* relevant Z-Wave region-specific PHY via \ref RAIL_ZWAVE_ConfigRegion().
*/
RAIL_Status_t RAIL_ZWAVE_Init(RAIL_Handle_t railHandle,
const RAIL_ZWAVE_Config_t *config);
/**
* De-initialize Z-Wave hardware acceleration.
*
* @param[in] railHandle A RAIL instance handle.
* @return Status code indicating success of the function call.
*
* Disables and resets all Z-Wave hardware acceleration features. This
* function should only be called when the radio is idle.
*/
RAIL_Status_t RAIL_ZWAVE_Deinit(RAIL_Handle_t railHandle);
/**
* Return whether Z-Wave hardware acceleration is currently enabled.
*
* @param[in] railHandle A RAIL instance handle.
* @return true if Z-Wave hardware acceleration was enabled to start with
* and false otherwise.
*/
bool RAIL_ZWAVE_IsEnabled(RAIL_Handle_t railHandle);
/**
* Configure Z-Wave options.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] mask A bitmask containing which options should be modified.
* @param[in] options A bitmask containing desired configuration settings.
* Bit positions for each option are found in the \ref RAIL_ZWAVE_Options_t.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_ZWAVE_ConfigOptions(RAIL_Handle_t railHandle,
RAIL_ZWAVE_Options_t mask,
RAIL_ZWAVE_Options_t options);
/**
* Inform RAIL of the Z-Wave node's Node Id for receive filtering.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] nodeId A Z-Wave Node Id.
* @return Status code indicating success of the function call.
*
* @note Until this API is called, RAIL will assume the Node Id is
* \ref RAIL_ZWAVE_NODE_ID_DEFAULT.
*/
RAIL_Status_t RAIL_ZWAVE_SetNodeId(RAIL_Handle_t railHandle,
RAIL_ZWAVE_NodeId_t nodeId);
/**
* Inform RAIL of the Z-Wave node's Home Id and its hash for receive filtering.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] homeId A Z-Wave Home Id.
* @param[in] homeIdHash The hash of the Home Id expected in beam frames.
* If this is \ref RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE, beam frame detection
* will not check the Home Id hash in a received beam frame at all, and
* \ref RAIL_EVENT_ZWAVE_BEAM will trigger based solely on the Node Id
* in the beam frame.
* @return Status code indicating success of the function call.
*
* @note Until this API is called, RAIL will assume the Home Id is an
* illegal one of \ref RAIL_ZWAVE_HOME_ID_DEFAULT, and its hash is \ref
* RAIL_ZWAVE_HOME_ID_HASH_DONT_CARE.
*/
RAIL_Status_t RAIL_ZWAVE_SetHomeId(RAIL_Handle_t railHandle,
RAIL_ZWAVE_HomeId_t homeId,
RAIL_ZWAVE_HomeIdHash_t homeIdHash);
/**
* Get the Node Id of the most recently seen beam frame that triggered
* \ref RAIL_EVENT_ZWAVE_BEAM.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] pNodeId A pointer to \ref RAIL_ZWAVE_NodeId_t to populate.
* @return Status code indicating success of the function call.
*
* @note This is best called while handling the \ref RAIL_EVENT_ZWAVE_BEAM
* event; if multiple beams are received only the most recent beam's NodeId
* is provided.
*/
RAIL_Status_t RAIL_ZWAVE_GetBeamNodeId(RAIL_Handle_t railHandle,
RAIL_ZWAVE_NodeId_t *pNodeId);
/**
* Get the Home Id hash of the most recently seen beam frame that triggered
* \ref RAIL_EVENT_ZWAVE_BEAM.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] pBeamHomeIdHash A pointer to \ref RAIL_ZWAVE_HomeIdHash_t to populate.
* @return Status code indicating success of the function call.
*
* @note This is best called while handling the \ref RAIL_EVENT_ZWAVE_BEAM
* event; if multiple beams are received only the most recent beam's Home Id hash
* is provided.
*/
RAIL_Status_t RAIL_ZWAVE_GetBeamHomeIdHash(RAIL_Handle_t railHandle,
RAIL_ZWAVE_HomeIdHash_t *pBeamHomeIdHash);
/**
* Get the channel hopping index of the most recently seen beam frame that
* triggered \ref RAIL_EVENT_ZWAVE_BEAM.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] pChannelIndex A pointer to a uint8_t to populate with
* the channel hopping index. If channel-hopping was off at the time
* the beam packet was received, \ref RAIL_CHANNEL_HOPPING_INVALID_INDEX
* is provided.
* @return Status code indicating success of the function call.
*
* @note This is best called while handling the \ref RAIL_EVENT_ZWAVE_BEAM
* event; if multiple beams are received only the most recent beam's
* channel hopping index is provided.
*/
RAIL_Status_t RAIL_ZWAVE_GetBeamChannelIndex(RAIL_Handle_t railHandle,
uint8_t *pChannelIndex);
/**
* Get the TX power used by the transmitter of the most recently seen
* long range beam frame that triggered \ref RAIL_EVENT_ZWAVE_BEAM.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] pLrBeamTxPower An application provided pointer to a uint8_t to
* be populated with the TX power of the latest long range beam. This will
* be set to \ref RAIL_ZWAVE_LR_BEAM_TX_POWER_INVALID if this API is called
* after receiving a regular non-long-range beam.
* @return Status code indicating success of the function call. This function
* will return \ref RAIL_STATUS_INVALID_STATE if called after receiving a
* regular (non-long-range) beam.
*
* @note This is best called while handling the \ref RAIL_EVENT_ZWAVE_BEAM
* event; if multiple beams are received only the most recent long range
* beam's TX power is provided.
*
* @note The following table shows long range beam TX power value to dBm
* value mapping:
*
* <table>
* <tr><th>Tx Power Value <th>Description
* <tr><td>0 <td>-6 dBm
* <tr><td>1 <td>-2 dBm
* <tr><td>2 <td>+2 dBm
* <tr><td>3 <td>+6 dBm
* <tr><td>4 <td>+10 dBm
* <tr><td>5 <td>+13 dBm
* <tr><td>6 <td>+16 dBm
* <tr><td>7 <td>+19 dBm
* <tr><td>8 <td>+21 dBm
* <tr><td>9 <td>+23 dBm
* <tr><td>10 <td>+25 dBm
* <tr><td>11 <td>+26 dBm
* <tr><td>12 <td>+27 dBm
* <tr><td>13 <td>+28 dBm
* <tr><td>14 <td>+29 dBm
* <tr><td>15 <td>+30 dBm
* </table>
*/
RAIL_Status_t RAIL_ZWAVE_GetLrBeamTxPower(RAIL_Handle_t railHandle,
uint8_t *pLrBeamTxPower);
/**
* Get the RSSI of the received beam frame.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] pBeamRssi An application provided pointer to a int8_t to
* be populated with the latest beam's RSSI, in dBm.
* @return Status code indicating success of the function call. This function
* will return \ref RAIL_STATUS_INVALID_STATE if called without ever
* having received a beam.
*
* @note This is best called while handling the \ref RAIL_EVENT_ZWAVE_BEAM
* event; if multiple beams are received only the most recent beam's
* RSSI is provided.
*/
RAIL_Status_t RAIL_ZWAVE_GetBeamRssi(RAIL_Handle_t railHandle,
int8_t *pBeamRssi);
/**
* Set the Raw Low Power settings.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] powerLevel Desired low power raw level.
* @return Status code indicating success of the function call.
*
* Low Power settings are required during Ack transmissions when
* the Low Power Bit is set. This setting is only valid for one
* subsequent transmission, after which all transmissions will be
* at the nominal power setting, until re-invoked.
*/
RAIL_Status_t RAIL_ZWAVE_SetTxLowPower(RAIL_Handle_t railHandle,
uint8_t powerLevel);
/**
* Set the Low Power settings in deci-dBm.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] powerLevel Desired low power level deci-dBm.
* @return Status code indicating success of the function call.
*
* Low Power settings are required during Ack transmissions when
* the Low Power Bit is set. This setting is only valid for one
* subsequent transmission, after which all transmissions will be
* at the nominal power setting, until re-invoked.
*/
RAIL_Status_t RAIL_ZWAVE_SetTxLowPowerDbm(RAIL_Handle_t railHandle,
RAIL_TxPower_t powerLevel);
/**
* Get the TX low power in raw units (see \ref rail_chip_specific.h for
* value ranges).
*
* @param[in] railHandle A RAIL instance handle.
* @return The chip-specific \ref RAIL_TxPowerLevel_t raw value of the low
* transmit power.
*
* This API returns the low raw power value that was set by
* \ref RAIL_ZWAVE_SetTxLowPower().
*
* Calling this function before configuring the Low Power PA
* (i.e., before a successful
* call to \ref RAIL_ZWAVE_SetTxLowPowerDbm() or \ref RAIL_ZWAVE_SetTxLowPower())
* will return a low power value that is the same as the nominal power.
* Also, calling this function before configuring the PA
* (i.e., before a successful call to \ref RAIL_ConfigTxPower()) will return
* \ref RAIL_TX_POWER_LEVEL_INVALID.
*/
RAIL_TxPowerLevel_t RAIL_ZWAVE_GetTxLowPower(RAIL_Handle_t railHandle);
/**
* Get the TX low power in terms of deci-dBm instead of raw power level.
*
* @param[in] railHandle A RAIL instance handle.
* @return The chip-specific \ref RAIL_TxPower_t value of the low
* transmit power in deci-dBm.
*/
RAIL_TxPower_t RAIL_ZWAVE_GetTxLowPowerDbm(RAIL_Handle_t railHandle);
/**
* Implement beam detection and reception algorithms.
*
* @param[in] railHandle A RAIL instance handle.
* @param[out] beamDetectIndex A pointer to an indicator of whether or not a beam was detected
* at all, regardless of if it was received, generally for use only by instruction
* from Silicon Labs. Can be NULL.
* @param[in] schedulerInfo A pointer to information to allow the radio scheduler to place
* this operation appropriately. This is only used in multiprotocol version of
* RAIL and may be set to NULL in all other versions.
* Note that Z-Wave currently does not support multiprotocol, so this
* scheduler info exists to future proof the API for when it does.
* @return Status code indicating success of the function call.
* Reasons for failure include an un-idled radio or a non-Japan non-Korea
* region configured before calling this function.
*
* This function takes care of all configuration and radio setup to
* detect and receive beams in the current Z-Wave region.
* If a beam is detected, RAIL will provide
* the usual \ref RAIL_EVENT_ZWAVE_BEAM event during which time users can
* process the beam as expected. However, normal packets may also be
* received during this time (also triggering \ref RAIL_EVENTS_RX_COMPLETION
* events), in which case, this API may need to be re-called to receive
* a beam. Users should also listen for
* \ref RAIL_EVENT_RX_CHANNEL_HOPPING_COMPLETE, which will indicate
* that no beam is heard. At that point, the radio will be automatically idled.
* Until one of these events is received, users should not try to
* reconfigure radio settings or start another radio operation. If an application
* needs to do some other operation or configuration, it must first call
* \ref RAIL_Idle() and wait for the radio to idle.
*
* @note: The radio must be idle before calling this function.
*
* @note: \ref RAIL_ConfigRxChannelHopping() must have been called successfully
* in Z-Wave before this function is called to provide a valid memory buffer
* for internal use (see \ref RAIL_RxChannelHoppingConfig_t::buffer).
*
* @note: This function alters radio functionality substantially. After calling
* it, the user should call \ref RAIL_ZWAVE_ConfigRegion(),
* \ref RAIL_ConfigRxChannelHopping(), \ref RAIL_EnableRxChannelHopping(),
* and \ref RAIL_SetRxTransitions() to reset these parameters to whatever
* behaviors were desired before calling this function. Additionally,
* this function will idle the radio upon on exit.
*/
RAIL_Status_t RAIL_ZWAVE_ReceiveBeam(RAIL_Handle_t railHandle,
uint8_t *beamDetectIndex,
const RAIL_SchedulerInfo_t *schedulerInfo);
/**
* Configure the receive algorithm used in \ref RAIL_ZWAVE_ReceiveBeam().
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] config A pointer to a configuration for the beam detection algorithm.
* @return Status code indicating success of the function call.
*
* @warning This function should not be used without direct instruction by Silicon Labs.
*/
RAIL_Status_t RAIL_ZWAVE_ConfigBeamRx(RAIL_Handle_t railHandle,
RAIL_ZWAVE_BeamRxConfig_t *config);
/**
* Set the default RX beam configuration.
*
* @param[in] railHandle A RAIL instance handle.
* @return Status code indicating success of the function call.
*
* @note This function resets any changes made to the beam configuration via
* \ref RAIL_ZWAVE_ConfigBeamRx() and the default beam configuration will be in effect
* on subsequent call(s) to \ref RAIL_ZWAVE_ReceiveBeam().
*/
RAIL_Status_t RAIL_ZWAVE_SetDefaultRxBeamConfig(RAIL_Handle_t railHandle);
/**
* Get the current RX beam configuration.
*
* @param[out] pConfig A pointer to \ref RAIL_ZWAVE_BeamRxConfig_t to be
* populated with the current beam configuration.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_ZWAVE_GetRxBeamConfig(RAIL_ZWAVE_BeamRxConfig_t *pConfig);
/**
* Configure the channel hop timings for use in Z-Wave RX channel hop configuration.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in,out] config A pointer to a configuration for Z-Wave RX channel hopping.
* This structure must be allocated in application global read-write memory.
* RAIL will populate fields within or referenced by this structure during its
* operation. Be sure to allocate \ref RAIL_RxChannelHoppingConfigEntry_t
* entries[] for \ref RAIL_NUM_ZWAVE_CHANNELS. Be sure to set \ref
* RAIL_RxChannelHoppingConfig_t::numberOfChannels to the desired number of
* channels.
* @return Status code indicating success of the function call.
*
* @warning This function should not be used without direct instruction by Silicon Labs.
*
* @note: This API must be called before \ref RAIL_EnableRxChannelHopping(). This
* API must never be called while the radio is on with RX Duty Cycle or Channel
* Hopping enabled.
*/
RAIL_Status_t RAIL_ZWAVE_ConfigRxChannelHopping(RAIL_Handle_t railHandle,
RAIL_RxChannelHoppingConfig_t *config);
/**
* Get the Z-Wave region.
*
* @param[in] railHandle A RAIL instance handle.
* @return The \ref RAIL_ZWAVE_RegionId_t value.
*
* @note \ref RAIL_ZWAVE_ConfigRegion() must have been called successfully
* before this function is called. Otherwise, \ref RAIL_ZWAVE_REGIONID_UNKNOWN
* is returned.
*/
RAIL_ZWAVE_RegionId_t RAIL_ZWAVE_GetRegion(RAIL_Handle_t railHandle);
/**
* Write the Auto-Ack FIFO for the next outgoing Z-Wave Long Range Ack.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] pLrAckData An application provided pointer to a const
* \ref RAIL_ZWAVE_LrAckData_t to populate the noise floor, TX power and receive
* rssi bytes of the outgoing Z-Wave Long Range Ack packet.
* @return Status code indicating success of the function call.
*
* This function sets the Auto-Ack data to use in acknowledging the frame
* being received. It must only be called while processing the \ref
* RAIL_EVENT_ZWAVE_LR_ACK_REQUEST_COMMAND.
* This will return \ref RAIL_STATUS_INVALID_STATE if it is too late to
* write the outgoing Ack. When successful, the ackData will
* only be sent once. Subsequent packets needing an Z-Wave Long Range Ack will
* each need to call this function to write the Ack information.
*/
RAIL_Status_t RAIL_ZWAVE_SetLrAckData(RAIL_Handle_t railHandle,
const RAIL_ZWAVE_LrAckData_t *pLrAckData);
/** EU-European Union */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_EU;
/** US-United States */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_US;
/** ANZ-Australia/New Zealand */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_ANZ;
/** HK-Hong Kong */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_HK;
/** MY-Malaysia */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_MY;
/** IN-India */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_IN;
/** JP-Japan */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_JP;
/** JP-Japan Energy-Detect */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_JPED;
/** RU-Russia */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_RU;
/** IL-Israel */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_IL;
/** KR-Korea */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_KR;
/** KR-Korea Energy-Detect */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_KRED;
/** CN-China */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_CN;
/** US-Long Range 1 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_US_LR1;
/** US-Long Range 2 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_US_LR2;
/** US-Long Range 3 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_US_LR3;
/** Backwards-compatible define */
#define RAIL_ZWAVE_REGION_US_LR_END_DEVICE RAIL_ZWAVE_REGION_US_LR3
/** EU-Long Range 1 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_EU_LR1;
/** EU-Long Range 2 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_EU_LR2;
/** EU-Long Range 3 */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_EU_LR3;
/** Backwards-compatible define */
#define RAIL_ZWAVE_REGION_EU_LR_END_DEVICE RAIL_ZWAVE_REGION_EU_LR3
/** Invalid Region */
extern const RAIL_ZWAVE_RegionConfig_t RAIL_ZWAVE_REGION_INVALID;
/** @} */ // end of Z_Wave
#ifdef __cplusplus
}
#endif
#endif // __RAIL_ZWAVE_H__