Imported more library files

Not compiling currently
This commit is contained in:
2025-04-12 23:37:19 +01:00
parent 264a3462e0
commit 9d06f983af
2518 changed files with 1021900 additions and 52 deletions

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,445 @@
/***************************************************************************//**
* @file
* @brief Definition of error codes that occur in RAIL.
* This file is purely informational and optional -
* it need not be included even if rail_assert libraries are included.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_ASSERT_ERROR_CODES_H__
#define __RAIL_ASSERT_ERROR_CODES_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup Assertions
* @{
*/
/**
* Enumeration of all possible error codes from RAIL_ASSERT.
*/
RAIL_ENUM_GENERIC(RAIL_AssertErrorCodes_t, uint32_t)
{
/** Appended info missing from RX packet. */
RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING = 0,
/** Receive FIFO too small for IR calibration. */
RAIL_ASSERT_FAILED_RX_FIFO_BYTES = 1,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_2 = 2,
/** Receive FIFO entry has invalid status. */
RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS = 3,
/** Receive FIFO entry bad packet length. */
RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH = 4,
/** Unable to configure radio for IR calibration. */
RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR = 5,
/** Reached unexpected state while handling RX FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO = 6,
/** Reached unexpected state while handling RXLEN FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO = 7,
/** Reached unexpected state while handling TX FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO = 8,
/** Reached unexpected state while handling TX ACK FIFO events. */
RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO = 9,
/** Invalid memory region accessed. */
RAIL_ASSERT_INVALID_MEMORY_ACCESS = 10,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_11 = 11,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_12 = 12,
/** Error synchronizing the RAIL timebase after sleep. */
RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP = 13,
/** VCO frequency outside supported range. */
RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY = 14,
/** Radio active while changing channels. */
RAIL_ASSERT_FAILED_RAC_STATE = 15,
/** Invalid Synth VCOCTRL field calculation. */
RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL = 16,
/** Nested attempt to lock the sequencer. */
RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK = 17,
/** RSSI averaging enabled without a valid callback. */
RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE = 18,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_19 = 19,
/** Unable to seed radio pseudo random number generator. */
RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED = 20,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_21 = 21,
/** Invalid timer channel specified. */
RAIL_ASSERT_FAILED_PROTIMER_CHANNEL = 22,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_23 = 23,
/** LBT config exceeds register size. */
RAIL_ASSERT_FAILED_BASECNTTOP = 24,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_25 = 25,
/** Could not synchronize RAIL timebase with the RTC. */
RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED = 26,
/** Clock source not ready. */
RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY = 27,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_28 = 28,
/** NULL was supplied as a RAIL_Handle_t argument. */
RAIL_ASSERT_NULL_HANDLE = 29,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_30 = 30,
/** API improperly called while protocol inactive. */
RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG = 31,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_32 = 32,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_33 = 33,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_34 = 34,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_35 = 35,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_36 = 36,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_37 = 37,
/** Failed to enable synth for transmit. */
RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE = 38,
/** This function is deprecated and must not be called. */
RAIL_ASSERT_DEPRECATED_FUNCTION = 39,
/** Multiprotocol task started with no event to run. */
RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT = 40,
/** Invalid interrupt enabled. */
RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED = 41,
/** Invalid assert, no longer used. */
RAIL_ASSERT_UNUSED_42 = 42,
/** Division by zero. */
RAIL_ASSERT_DIVISION_BY_ZERO = 43,
/** Function cannot be called without access to the hardware. */
RAIL_ASSERT_CANT_USE_HARDWARE = 44,
/** Pointer parameter was passed as NULL. */
RAIL_ASSERT_NULL_PARAMETER = 45,
/** Secure Element fault */
RAIL_ASSERT_SECURE_ELEMENT_FAULT = 46,
/** Synth radio config buffer for channel hopping too small. */
RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER = 47,
/** Buffer provided for RX Channel Hopping is too small. */
RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT = 48,
/** Invalid action was attempted on a module. */
RAIL_ASSERT_INVALID_MODULE_ACTION = 49,
/** The radio config for this channel is not compatible with channel hopping. */
RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG = 50,
/** Channel change failed. */
RAIL_ASSERT_CHANNEL_CHANGE_FAILED = 51,
/** Attempted to read invalid register. */
RAIL_ASSERT_INVALID_REGISTER = 52,
/** CP/DMA Invalid error. */
RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR = 53,
/** DMP radio config caching failed. */
RAIL_ASSERT_CACHE_CONFIG_FAILED = 54,
/** NULL was supplied as a RAIL_StateTransitions_t argument. */
RAIL_ASSERT_NULL_TRANSITIONS = 55,
/** LDMA transfer failed. */
RAIL_ASSERT_BAD_LDMA_TRANSFER = 56,
/** Attempted to wake up with invalid RTCC sync data. */
RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES = 57,
/** Radio sequencer hit a fault condition. */
RAIL_ASSERT_SEQUENCER_FAULT = 58,
/** Bus fault. */
RAIL_ASSERT_BUS_ERROR = 59,
/** The current radio config cannot be used with packet filtering. */
RAIL_ASSERT_INVALID_FILTERING_CONFIG = 60,
/** Retiming configuration error. */
RAIL_ASSERT_RETIMING_CONFIG = 61,
/** TX CRC configuration is corrupt. */
RAIL_ASSERT_FAILED_TX_CRC_CONFIG = 62,
/** The current PA config does not allow for this operation. */
RAIL_ASSERT_INVALID_PA_OPERATION = 63,
/** The sequencer selected an invalid PA. */
RAIL_ASSERT_SEQ_INVALID_PA_SELECTED = 64,
/** Invalid/unsupported channel config. */
RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG = 65,
/** Radio Calculator configuration HFXO frequency mismatch with chip */
RAIL_ASSERT_INVALID_XTAL_FREQUENCY = 66,
/** Internal error. */
RAIL_ASSERT_INTERNAL_GENERIC_ERROR = 67,
/** Software modem image does not support requested modulation */
RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION = 68,
/** Failed to disable RTCC synchronization. */
RAIL_ASSERT_FAILED_RTCC_SYNC_STOP = 69,
/** Multitimer linked list corrupted. */
RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT = 70,
/** Unable to configure radio for temperature calibration. */
RAIL_ASSERT_FAILED_TEMPCAL_ERROR = 71,
/** Invalid VDET configuration. */
RAIL_ASSERT_INVALID_VDET_CONFIGURATION = 72,
/** Invalid RFFPLL configuration. */
RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION = 73,
/** Secure access fault. */
RAIL_ASSERT_SECURE_ACCESS_FAULT = 74,
/** SYSRTC0 not running. */
RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING = 75,
/** Radio Configurator not updated. */
RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE = 76,
/** Failed to set the event for configurable RSSI threshold. */
RAIL_ASSERT_FAILED_RSSI_THRESHOLD = 77,
/** Intended and actual Z-Wave region configuration mismatch. */
RAIL_ASSERT_INCORRECT_ZWAVE_REGION = 78,
/** Attempted to sleep with stale RTCC synchronization data */
RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA = 79,
/** Attempted to clear LOG2X4 with a DEC1 value not equal to 0 */
RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION = 80,
/** Failed to complete DMA write */
RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE = 81,
/** RAIL does not support this Radio Calculator configuration */
RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED = 82,
/** Invalid binary image was loaded onto the sequencer */
RAIL_ASSERT_INVALID_SEQUENCER_IMAGE = 83,
/** No common or protocol image selected to be loaded onto the sequencer */
RAIL_ASSERT_MISSING_SEQUENCER_IMAGE = 84,
/** Software modem image invalid or missing */
RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE = 85,
/** The sequencer user generated error. */
RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR = 86,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_APPENDED_INFO_MISSING)
#define RAIL_ASSERT_FAILED_RX_FIFO_BYTES ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RX_FIFO_BYTES)
#define RAIL_ASSERT_UNUSED_2 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_2)
#define RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_ILLEGAL_RXLEN_ENTRY_STATUS)
#define RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_BAD_PACKET_LENGTH)
#define RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_DIVCTRL_ENUM_CONVERSION_ERROR)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RX_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_RXLEN_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TX_FIFO)
#define RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_UNEXPECTED_STATE_TXACK_FIFO)
#define RAIL_ASSERT_INVALID_MEMORY_ACCESS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_MEMORY_ACCESS)
#define RAIL_ASSERT_UNUSED_11 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_11)
#define RAIL_ASSERT_UNUSED_12 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_12)
#define RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_POST_WAKEUP)
#define RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_VCO_FREQUENCY)
#define RAIL_ASSERT_FAILED_RAC_STATE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RAC_STATE)
#define RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYNTH_INVALID_VCOCTRL)
#define RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_NESTED_SEQUENCER_LOCK)
#define RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RSSI_AVERAGE_DONE)
#define RAIL_ASSERT_UNUSED_19 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_19)
#define RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_PROTIMER_RANDOM_SEED)
#define RAIL_ASSERT_UNUSED_21 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_21)
#define RAIL_ASSERT_FAILED_PROTIMER_CHANNEL ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_PROTIMER_CHANNEL)
#define RAIL_ASSERT_UNUSED_23 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_23)
#define RAIL_ASSERT_FAILED_BASECNTTOP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_BASECNTTOP)
#define RAIL_ASSERT_UNUSED_25 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_25)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_MISSED)
#define RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_CLOCK_SOURCE_NOT_READY)
#define RAIL_ASSERT_UNUSED_28 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_28)
#define RAIL_ASSERT_NULL_HANDLE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_HANDLE)
#define RAIL_ASSERT_UNUSED_30 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_30)
#define RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_NO_ACTIVE_CONFIG)
#define RAIL_ASSERT_UNUSED_32 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_32)
#define RAIL_ASSERT_UNUSED_33 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_33)
#define RAIL_ASSERT_UNUSED_34 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_34)
#define RAIL_ASSERT_UNUSED_35 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_35)
#define RAIL_ASSERT_UNUSED_36 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_36)
#define RAIL_ASSERT_UNUSED_37 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_37)
#define RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TX_SYNTH_ENABLE)
#define RAIL_ASSERT_DEPRECATED_FUNCTION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_DEPRECATED_FUNCTION)
#define RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_MULTIPROTOCOL_NO_EVENT)
#define RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_INVALID_INTERRUPT_ENABLED)
#define RAIL_ASSERT_UNUSED_42 ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNUSED_42)
#define RAIL_ASSERT_DIVISION_BY_ZERO ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_DIVISION_BY_ZERO)
#define RAIL_ASSERT_CANT_USE_HARDWARE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CANT_USE_HARDWARE)
#define RAIL_ASSERT_NULL_PARAMETER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_PARAMETER)
#define RAIL_ASSERT_SECURE_ELEMENT_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SECURE_ELEMENT_FAULT)
#define RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SMALL_SYNTH_RADIO_CONFIG_BUFFER)
#define RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_HOPPING_BUFFER_TOO_SHORT)
#define RAIL_ASSERT_INVALID_MODULE_ACTION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_MODULE_ACTION)
#define RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_HOPPING_INVALID_RADIO_CONFIG)
#define RAIL_ASSERT_CHANNEL_CHANGE_FAILED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CHANNEL_CHANGE_FAILED)
#define RAIL_ASSERT_INVALID_REGISTER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_REGISTER)
#define RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CP_DMA_INTERNAL_GENERIC_ERROR)
#define RAIL_ASSERT_CACHE_CONFIG_FAILED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CACHE_CONFIG_FAILED)
#define RAIL_ASSERT_NULL_TRANSITIONS ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_NULL_TRANSITIONS)
#define RAIL_ASSERT_BAD_LDMA_TRANSFER ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_BAD_LDMA_TRANSFER)
#define RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_RTCC_SYNC_VALUES)
#define RAIL_ASSERT_SEQUENCER_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQUENCER_FAULT)
#define RAIL_ASSERT_BUS_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_BUS_ERROR)
#define RAIL_ASSERT_INVALID_FILTERING_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_FILTERING_CONFIG)
#define RAIL_ASSERT_RETIMING_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_RETIMING_CONFIG)
#define RAIL_ASSERT_FAILED_TX_CRC_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TX_CRC_CONFIG)
#define RAIL_ASSERT_INVALID_PA_OPERATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_PA_OPERATION)
#define RAIL_ASSERT_SEQ_INVALID_PA_SELECTED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQ_INVALID_PA_SELECTED)
#define RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_INVALID_CHANNEL_CONFIG)
#define RAIL_ASSERT_INVALID_XTAL_FREQUENCY ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_XTAL_FREQUENCY)
#define RAIL_ASSERT_INTERNAL_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INTERNAL_GENERIC_ERROR)
#define RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_UNSUPPORTED_SOFTWARE_MODEM_MODULATION)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_STOP ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_STOP)
#define RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_MULTITIMER_CORRUPT)
#define RAIL_ASSERT_FAILED_TEMPCAL_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_TEMPCAL_ERROR)
#define RAIL_ASSERT_INVALID_VDET_CONFIGURATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_VDET_CONFIGURATION)
#define RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_RFFPLL_CONFIGURATION)
#define RAIL_ASSERT_SECURE_ACCESS_FAULT ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SECURE_ACCESS_FAULT)
#define RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_SYSRTC0_NOT_RUNNING)
#define RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_RADIO_CONFIG_NOT_UP_TO_DATE)
#define RAIL_ASSERT_FAILED_RSSI_THRESHOLD ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RSSI_THRESHOLD)
#define RAIL_ASSERT_INCORRECT_ZWAVE_REGION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INCORRECT_ZWAVE_REGION)
#define RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_RTCC_SYNC_STALE_DATA)
#define RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_LOG2X4_CLEAR_CONDITION)
#define RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_FAILED_DMA_WRITE_INCOMPLETE)
#define RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_CALCULATOR_NOT_SUPPORTED)
#define RAIL_ASSERT_INVALID_SEQUENCER_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_SEQUENCER_IMAGE)
#define RAIL_ASSERT_MISSING_SEQUENCER_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_MISSING_SEQUENCER_IMAGE)
#define RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_INVALID_OR_MISSING_SOFTWARE_MODEM_IMAGE)
#define RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR ((RAIL_AssertErrorCodes_t) RAIL_ASSERT_SEQ_USER_SEQUENCER_GENERIC_ERROR)
#endif//DOXYGEN_SHOULD_SKIP_THIS
/// Use this define to create an array of error messages that map to the codes
/// in \ref RAIL_AssertErrorCodes_t. You can use these to print slightly more
/// detailed error strings related to a particular assert error code if desired.
/// For example, you could implement your assert failed callback as follows to
/// make use of this.
/// @code{.c}
/// void RAILCb_AssertFailed(RAIL_Handle_t railHandle, RAIL_AssertErrorCodes_t errorCode)
/// {
/// static const char* railErrorMessages[] = RAIL_ASSERT_ERROR_MESSAGES;
/// const char *errorMessage = "Unknown";
///
/// // If this error code is within the range of known error messages then use
/// // the appropriate error message.
/// if (errorCode < (sizeof(railErrorMessages) / sizeof(char*))) {
/// errorMessage = railErrorMessages[errorCode];
/// }
/// printf("RAIL ASSERT %u: %s\n", errorCode, errorMessage);
///
/// // Reset the chip since an assert is a fatal error
/// NVIC_SystemReset();
/// }
/// @endcode
///
#define RAIL_ASSERT_ERROR_MESSAGES { \
/* 0*/ "Appended info missing from RX packet", \
/* 1*/ "Receive FIFO too small for IR calibration", \
/* 2*/ "Invalid assert, no longer used", \
/* 3*/ "Receive FIFO entry has invalid status", \
/* 4*/ "Receive FIFO entry bad packet length", \
/* 5*/ "Unable to configure radio for IR calibration", \
/* 6*/ "Reached unexpected state while handling RX FIFO events", \
/* 7*/ "Reached unexpected state while handling RXLEN FIFO events", \
/* 8*/ "Reached unexpected state while handling TX FIFO events", \
/* 9*/ "Reached unexpected state while handling TX ACK FIFO events", \
/*10*/ "Invalid memory region accessed", \
/*11*/ "Invalid assert, no longer used", \
/*12*/ "Invalid assert, no longer used", \
/*13*/ "Error synchronizing the RAIL timebase after sleep", \
/*14*/ "VCO frequency outside supported range", \
/*15*/ "Radio active while changing channels", \
/*16*/ "Invalid Synth VCOCTRL field calculation", \
/*17*/ "Nested attempt to lock the sequencer", \
/*18*/ "RSSI averaging enabled without a valid callback", \
/*19*/ "Invalid assert, no longer used", \
/*20*/ "Unable to seed radio pseudo random number generator", \
/*21*/ "Invalid assert, no longer used", \
/*22*/ "Invalid timer channel specified", \
/*23*/ "Invalid assert, no longer used", \
/*24*/ "LBT config exceeds register size", \
/*25*/ "Invalid assert, no longer used", \
/*26*/ "Could not synchronize RAIL timebase with the RTC", \
/*27*/ "Clock source not ready", \
/*28*/ "Invalid assert, no longer used", \
/*29*/ "NULL was supplied as a RAIL_Handle_t argument", \
/*30*/ "Invalid assert, no longer used", \
/*31*/ "API improperly called while protocol inactive", \
/*32*/ "Invalid assert, no longer used", \
/*33*/ "Invalid assert, no longer used", \
/*34*/ "Invalid assert, no longer used", \
/*35*/ "Invalid assert, no longer used", \
/*36*/ "Invalid assert, no longer used", \
/*37*/ "Invalid assert, no longer used", \
/*38*/ "Failed to enable synth for transmit.", \
/*39*/ "This function is deprecated and must not be called", \
/*40*/ "Multiprotocol task started with no event to run", \
/*41*/ "Invalid interrupt enabled", \
/*42*/ "Invalid assert, no longer used", \
/*43*/ "Division by zero", \
/*44*/ "Function cannot be called without access to the hardware", \
/*45*/ "Pointer parameter was passed as NULL", \
/*46*/ "Secure Element fault", \
/*47*/ "Synth radio config buffer for channel hopping too small", \
/*48*/ "Buffer provided for RX Channel Hopping is too small", \
/*49*/ "Invalid action was attempted on a module", \
/*50*/ "The radio config for this channel is not compatible with channel hopping", \
/*51*/ "Channel change failed", \
/*52*/ "Attempted to read invalid register", \
/*53*/ "CP/DMA Generic internal error", \
/*54*/ "DMP radio config caching failed", \
/*55*/ "NULL was supplied as a RAIL_StateTransitions_t argument", \
/*56*/ "LDMA transfer failed", \
/*57*/ "Attempted to wake up with invalid RTCC sync data", \
/*58*/ "Radio sequencer hit a fault condition", \
/*59*/ "Bus fault", \
/*60*/ "The current radio config cannot be used with packet filtering", \
/*61*/ "Retiming configuration error", \
/*62*/ "TX CRC configuration is corrupt", \
/*63*/ "The current PA config does not allow for this operation", \
/*64*/ "The sequencer selected an invalid PA", \
/*65*/ "Invalid/unsupported channel config", \
/*66*/ "Radio Calculator configuration HFXO frequency mismatch with chip", \
/*67*/ "Generic internal error", \
/*68*/ "Software modem image does not support requested modulation", \
/*69*/ "Failed to disable RTCC synchronization", \
/*70*/ "Multitimer linked list corrupted", \
/*71*/ "Unable to configure radio for temperature calibration", \
/*72*/ "Invalid VDET configuration", \
/*73*/ "PHY and System RFFPLL settings do not match", \
/*74*/ "Secure access fault", \
/*75*/ "SYSRTC0 not running", \
/*76*/ "Radio Configurator not updated", \
/*77*/ "Failed to set the event for configurable RSSI threshold", \
/*78*/ "Intended and actual Z-Wave region configuration mismatch", \
/*79*/ "Attempted to sleep with stale RTCC synchronization data", \
/*80*/ "Attempted to clear LOG2X4 with a DEC1 value not equal to 0", \
/*81*/ "Failed to complete DMA write", \
/*82*/ "RAIL does not support this Radio Calculator configuration", \
/*83*/ "Invalid binary image loaded on sequencer", \
/*84*/ "No common or protocol image selected to be loaded onto the sequencer", \
/*85*/ "Software modem image invalid or missing", \
/*86*/ "The sequencer user generated error", \
}
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Undocumented RAIL 2.x internal symbol renaming
#define RAIL_AssertErrorCode sli_rail_assert_error_code
#define RAIL_AssertLineNumber sli_rail_assert_line_number
#define RAIL_AssertRailHandle sli_rail_assert_rail_handle
#endif//DOXYGEN_SHOULD_SKIP_THIS
/** @} */ // end of Assertions
#ifdef __cplusplus
}
#endif
#endif // __RAIL_ASSERT_ERROR_CODES_H__

View File

@@ -0,0 +1,952 @@
/***************************************************************************//**
* @file
* @brief Auxiliary header for the RAIL library. Includes consistent definitions
* of features available across different chips.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_FEATURES_H__
#define __RAIL_FEATURES_H__
#include "em_device.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup RAIL_API
* @{
*/
/******************************************************************************
* RAIL Features
*****************************************************************************/
/**
* @addtogroup Features
* @brief Overview of support for various features across hardware platforms.
* These defines can be used at compile time to determine which
* features are available on your platform. However, keep in mind that
* these defines hold true for chip families. Your specific part
* may have further restrictions (band limitations, power amplifier
* restrictions, and so on) on top of those listed below, for which
* runtime RAIL_*Supports*() APIs can be used to check availability
* on a particular chip (after \ref RAIL_Init() has been called).
* In general, an attempt to call an API that is not supported on your
* chip family as listed below will result in a
* \ref RAIL_STATUS_INVALID_CALL.
* @{
*/
/// Boolean to indicate whether the selected chip supports both Sub-GHz and 2.4 GHz bands.
/// See also runtime refinement \ref RAIL_SupportsDualBand().
#if ((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| ((FEAT_RF_2G4 == 1) && (FEAT_RF_SUBG == 1)))
#define RAIL_SUPPORTS_DUAL_BAND 1
#else
#define RAIL_SUPPORTS_DUAL_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_DUAL_BAND.
#define RAIL_FEAT_DUAL_BAND_RADIO RAIL_SUPPORTS_DUAL_BAND
/// Boolean to indicate whether the selected chip supports the 2.4 GHz band.
/// See also runtime refinement \ref RAIL_Supports2p4GHzBand().
#if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_2G4HZ)) \
|| (FEAT_RF_2G4 == 1))
#define RAIL_SUPPORTS_2P4GHZ_BAND 1
#else
#define RAIL_SUPPORTS_2P4GHZ_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_2P4GHZ_BAND.
#define RAIL_FEAT_2G4_RADIO RAIL_SUPPORTS_2P4GHZ_BAND
/// Boolean to indicate whether the selected chip supports Sub-GHz bands.
/// See also runtime refinement \ref RAIL_SupportsSubGHzBand().
#if (((_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_DUALBAND) \
|| (_SILICON_LABS_EFR32_RADIO_TYPE == _SILICON_LABS_EFR32_RADIO_SUBGHZ)) \
|| (FEAT_RF_SUBG == 1))
#define RAIL_SUPPORTS_SUBGHZ_BAND 1
#else
#define RAIL_SUPPORTS_SUBGHZ_BAND 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_SUBGHZ_BAND.
#define RAIL_FEAT_SUBGIG_RADIO RAIL_SUPPORTS_SUBGHZ_BAND
/// Boolean to indicate whether the selected chip supports OFDM PA.
/// See also runtime refinement \ref RAIL_SupportsOFDMPA().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_OFDM_PA 1
#else
#define RAIL_SUPPORTS_OFDM_PA 0
#endif
/// Boolean to indicate whether the selected chip supports
/// bit masked address filtering.
/// See also runtime refinement \ref RAIL_SupportsAddrFilterAddressBitMask().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
#define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 1
#else
#define RAIL_SUPPORTS_ADDR_FILTER_ADDRESS_BIT_MASK 0
#endif
/// Boolean to indicate whether the selected chip supports
/// address filter mask information for incoming packets in
/// \ref RAIL_RxPacketInfo_t::filterMask and
/// \ref RAIL_IEEE802154_Address_t::filterMask.
/// See also runtime refinement \ref RAIL_SupportsAddrFilterMask().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_SUPPORTS_ADDR_FILTER_MASK 1
#else
#define RAIL_SUPPORTS_ADDR_FILTER_MASK 0
#endif
/// Boolean to indicate whether the selected chip supports
/// alternate power settings for the Power Amplifier.
/// See also runtime refinement \ref RAIL_SupportsAlternateTxPower().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG > 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_ALTERNATE_TX_POWER 1
#else
#define RAIL_SUPPORTS_ALTERNATE_TX_POWER 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ALTERNATE_TX_POWER.
#define RAIL_FEAT_ALTERNATE_POWER_TX_SUPPORTED RAIL_SUPPORTS_ALTERNATE_TX_POWER
/// Boolean to indicate whether the selected chip supports antenna diversity.
/// See also runtime refinement \ref RAIL_SupportsAntennaDiversity().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES == 2))
#define RAIL_SUPPORTS_ANTENNA_DIVERSITY 1
#else
#define RAIL_SUPPORTS_ANTENNA_DIVERSITY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_ANTENNA_DIVERSITY.
#define RAIL_FEAT_ANTENNA_DIVERSITY RAIL_SUPPORTS_ANTENNA_DIVERSITY
/// Boolean to indicate whether the selected chip supports internal RF path diversity.
/// See also runtime refinement \ref RAIL_SupportsPathDiversity().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PATH_DIVERSITY 1
#else
#define RAIL_SUPPORTS_PATH_DIVERSITY 0
#endif
/// Boolean to indicate whether the selected chip supports channel hopping.
/// See also runtime refinement \ref RAIL_SupportsChannelHopping().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG >= 1) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_SUPPORTS_CHANNEL_HOPPING 1
#else
#define RAIL_SUPPORTS_CHANNEL_HOPPING 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_CHANNEL_HOPPING.
#define RAIL_FEAT_CHANNEL_HOPPING RAIL_SUPPORTS_CHANNEL_HOPPING
/// Boolean to indicate whether the selected chip supports dual sync words.
/// See also runtime refinement \ref RAIL_SupportsDualSyncWords().
#if 1
#define RAIL_SUPPORTS_DUAL_SYNC_WORDS 1
#else
#define RAIL_SUPPORTS_DUAL_SYNC_WORDS 0
#endif
/// Boolean to indicate whether the selected chip supports automatic transitions
/// from TX to TX.
/// See also runtime refinement \ref RAIL_SupportsTxToTx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_SUPPORTS_TX_TO_TX 1
#else
#define RAIL_SUPPORTS_TX_TO_TX 0
#endif
/// Boolean to indicate whether the selected chip supports \ref RAIL_TX_REPEAT_OPTION_START_TO_START.
/// See also runtime refinement \ref RAIL_SupportsTxRepeatStartToStart().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
#define RAIL_SUPPORTS_TX_REPEAT_START_TO_START RAIL_SUPPORTS_TX_TO_TX
#else
#define RAIL_SUPPORTS_TX_REPEAT_START_TO_START 0
#endif
/// Boolean to indicate whether the selected chip supports thermistor measurements.
/// See also runtime refinement \ref RAIL_SupportsExternalThermistor().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 1
#else
#define RAIL_SUPPORTS_EXTERNAL_THERMISTOR 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_EXTERNAL_THERMISTOR.
#define RAIL_FEAT_EXTERNAL_THERMISTOR RAIL_SUPPORTS_EXTERNAL_THERMISTOR
/// Boolean to indicate whether the selected chip supports HFXO compensation.
/// See also runtime refinement \ref RAIL_SupportsHFXOCompensation().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_HFXO_COMPENSATION RAIL_SUPPORTS_EXTERNAL_THERMISTOR
#else
#define RAIL_SUPPORTS_HFXO_COMPENSATION 0
#endif
/// Boolean to indicate whether the selected chip supports AUXADC measurements.
/// See also runtime refinement \ref RAIL_SupportsAuxAdc().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_AUXADC 1
#else
#define RAIL_SUPPORTS_AUXADC 0
#endif
/// Boolean to indicate whether the selected chip supports a high-precision
/// LFRCO.
/// Best to use the runtime refinement \ref RAIL_SupportsPrecisionLFRCO()
/// because some chip revisions do not support it.
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_PRECISION_LFRCO 1
#else
#define RAIL_SUPPORTS_PRECISION_LFRCO 0
#endif
/// Boolean to indicate whether the selected chip supports radio entropy.
/// See also runtime refinement \ref RAIL_SupportsRadioEntropy().
#ifndef FPGA
#define RAIL_SUPPORTS_RADIO_ENTROPY 1
#else
#define RAIL_SUPPORTS_RADIO_ENTROPY 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RFSENSE Energy Detection Mode.
/// See also runtime refinement \ref RAIL_SupportsRfSenseEnergyDetection().
#if ((_SILICON_LABS_32B_SERIES == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 1
#else
#define RAIL_SUPPORTS_RFSENSE_ENERGY_DETECTION 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RFSENSE Selective(OOK) Mode.
/// See also runtime refinement \ref RAIL_SupportsRfSenseSelectiveOok().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 1
#else
#define RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK.
#define RAIL_FEAT_RFSENSE_SELECTIVE_OOK_MODE_SUPPORTED \
RAIL_SUPPORTS_RFSENSE_SELECTIVE_OOK
/// Boolean to indicate whether the selected chip supports the
/// VDET voltage measurement feature.
/// See also runtime refinement \ref RAIL_SupportsVdet().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_VDET 1
#else
#define RAIL_SUPPORTS_VDET 0
#endif
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports the User Sequencer
/// See also runtime refinement \ref RAIL_SupportsUserSequencer().
#if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)
#define RAIL_SUPPORTS_USER_SEQUENCER 1
#else
#define RAIL_SUPPORTS_USER_SEQUENCER 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
// BLE features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports BLE.
/// See also runtime refinement \ref RAIL_SupportsProtocolBLE().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 4)
#define RAIL_SUPPORTS_PROTOCOL_BLE RAIL_SUPPORTS_2P4GHZ_BAND
#else
#define RAIL_SUPPORTS_PROTOCOL_BLE 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps
/// Non-Viterbi PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports1MbpsNonViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 1)
#define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps Viterbi
/// PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports1MbpsViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_1MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_1MBPS_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 1 Mbps operation.
/// See also runtime refinement \ref RAIL_BLE_Supports1Mbps().
#define RAIL_BLE_SUPPORTS_1MBPS \
(RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_1MBPS_VITERBI)
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps
/// Non-Viterbi PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports2MbpsNonViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 2)
#define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps Viterbi
/// PHY.
/// See also runtime refinement \ref RAIL_BLE_Supports2MbpsViterbi().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_2MBPS_VITERBI RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_2MBPS_VITERBI 0
#endif
/// Boolean to indicate whether the selected chip supports BLE 2 Mbps operation.
/// See also runtime refinement \ref RAIL_BLE_Supports2Mbps().
#define RAIL_BLE_SUPPORTS_2MBPS \
(RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI || RAIL_BLE_SUPPORTS_2MBPS_VITERBI)
/// Boolean to indicate whether the selected chip supports BLE
/// Antenna Switching needed for Angle-of-Arrival receives or
/// Angle-of-Departure transmits.
/// See also runtime refinement \ref RAIL_BLE_SupportsAntennaSwitching().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING 0
#endif
/// Boolean to indicate whether the selected chip supports the BLE Coded PHY
/// used for Long-Range.
/// See also runtime refinement \ref RAIL_BLE_SupportsCodedPhy().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_CODED_PHY RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CODED_PHY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_CODED_PHY.
#define RAIL_FEAT_BLE_CODED RAIL_BLE_SUPPORTS_CODED_PHY
/// Boolean to indicate whether the selected chip supports the BLE Simulscan PHY
/// used for simultaneous BLE 1 Mbps and Coded PHY reception.
/// See also runtime refinement \ref RAIL_BLE_SupportsSimulscanPhy().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_SIMULSCAN_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports BLE
/// CTE (Constant Tone Extension) needed for Angle-of-Arrival/Departure
/// transmits.
/// See also runtime refinement \ref RAIL_BLE_SupportsCte().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_CTE RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CTE 0
#endif
/// Boolean to indicate whether the selected chip supports the
/// Quuppa PHY.
/// See also runtime refinement \ref RAIL_BLE_SupportsQuuppa().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
#define RAIL_BLE_SUPPORTS_QUUPPA RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_QUUPPA 0
#endif
/// Boolean to indicate whether the selected chip supports BLE
/// IQ Sampling needed for Angle-of-Arrival/Departure receives.
/// See also runtime refinement \ref RAIL_BLE_SupportsIQSampling().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_BLE_SUPPORTS_IQ_SAMPLING RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_IQ_SAMPLING 0
#endif
/// Boolean to indicate whether the selected chip supports some BLE AOX
/// features.
#define RAIL_BLE_SUPPORTS_AOX \
(RAIL_BLE_SUPPORTS_ANTENNA_SWITCHING \
|| RAIL_BLE_SUPPORTS_IQ_SAMPLING \
|| RAIL_BLE_SUPPORTS_CTE)
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_AOX
#define RAIL_FEAT_BLE_AOX_SUPPORTED RAIL_BLE_SUPPORTS_AOX
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports BLE
/// CS (Channel Sounding).
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 4)
#define RAIL_BLE_SUPPORTS_CS RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_CS 0
#endif
#endif//DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports BLE PHY switch to RX
/// functionality, which is used to switch BLE PHYs at a specific time
/// to receive auxiliary packets.
/// See also runtime refinement \ref RAIL_BLE_SupportsPhySwitchToRx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX RAIL_SUPPORTS_PROTOCOL_BLE
#else
#define RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX 0
#endif
/// Backwards-compatible synonym of \ref RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX.
#define RAIL_FEAT_BLE_PHY_SWITCH_TO_RX RAIL_BLE_SUPPORTS_PHY_SWITCH_TO_RX
// IEEE 802.15.4 features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports IEEE 802.15.4.
/// See also runtime refinement \ref RAIL_SupportsProtocolIEEE802154().
#if 1
#define RAIL_SUPPORTS_PROTOCOL_IEEE802154 1
#else
#define RAIL_SUPPORTS_PROTOCOL_IEEE802154 0
#endif
/// Boolean to indicate whether the selected chip supports the
/// 802.15.4 Wi-Fi Coexistence PHY.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsCoexPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG > 1)
#define RAIL_IEEE802154_SUPPORTS_COEX_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_COEX_PHY 0
#endif
/// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_COEX_PHY.
#define RAIL_FEAT_802154_COEX_PHY RAIL_IEEE802154_SUPPORTS_COEX_PHY
/// Boolean to indicate whether the selected chip supports
/// the IEEE 802.15.4 2.4 GHz band variant.
/// See also runtime refinement \ref RAIL_SupportsIEEE802154Band2P4().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3)
#define RAIL_SUPPORTS_IEEE802154_BAND_2P4 (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_SUPPORTS_IEEE802154_BAND_2P4 0
#endif
/// Boolean to indicate whether the selected chip supports
/// the IEEE 802.15.4 2.4 RX channel switching.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsRxChannelSwitching().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6))
#define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING (RAIL_SUPPORTS_IEEE802154_BAND_2P4)
#else
#define RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING 0
#endif
/// Boolean to indicate whether the selected chip supports a front end module.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsFemPhy().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 8)
#define RAIL_IEEE802154_SUPPORTS_FEM_PHY (RAIL_SUPPORTS_IEEE802154_BAND_2P4)
#else
#define RAIL_IEEE802154_SUPPORTS_FEM_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4E-2012 feature subset needed for Zigbee R22 GB868.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsESubsetGB868().
#if 1
#define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868.
#define RAIL_FEAT_IEEE802154_E_GB868_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4E-2012 Enhanced ACKing.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEEnhancedAck().
#if 1
#define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK.
#define RAIL_FEAT_IEEE802154_E_ENH_ACK_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_ENHANCED_ACK
/// Boolean to indicate whether the selected chip supports
/// receiving IEEE 802.15.4E-2012 Multipurpose frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEMultipurposeFrames().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES RAIL_IEEE802154_SUPPORTS_E_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES.
#define RAIL_FEAT_IEEE802154_MULTIPURPOSE_FRAME_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_E_MULTIPURPOSE_FRAMES
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 feature subset needed for Zigbee R22 GB868.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGSubsetGB868().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG != 3)
#define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 \
((RAIL_SUPPORTS_PROTOCOL_IEEE802154 != 0) && (RAIL_SUPPORTS_SUBGHZ_BAND != 0))
#else
#define RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868.
#define RAIL_FEAT_IEEE802154_G_GB868_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
/// Boolean to indicate whether the selected chip supports
/// dynamic FEC
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGDynFec().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG > 1) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_IEEE802154_SUPPORTS_G_DYNFEC \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now
#else
#define RAIL_IEEE802154_SUPPORTS_G_DYNFEC 0
#endif
/// Boolean to indicate whether the selected chip supports
/// Wi-SUN mode switching
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGModeSwitch().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH \
RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868 // limit to Sub-GHz for now
#else
#define RAIL_IEEE802154_SUPPORTS_G_MODESWITCH 0
#endif
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 reception and transmission of frames
/// with 4-byte CRC.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsG4ByteCrc().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC 0
#endif
/// Backwards-compatible synonym of \ref RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC.
#define RAIL_FEAT_IEEE802154_G_4BYTE_CRC_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_4BYTE_CRC
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 reception of unwhitened frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGUnwhitenedRx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX.
#define RAIL_FEAT_IEEE802154_G_UNWHITENED_RX_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_RX
/// Boolean to indicate whether the selected chip supports
/// IEEE 802.15.4G-2012 transmission of unwhitened frames.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsGUnwhitenedTx().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG != 1)
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX RAIL_IEEE802154_SUPPORTS_G_SUBSET_GB868
#else
#define RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX.
#define RAIL_FEAT_IEEE802154_G_UNWHITENED_TX_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_G_UNWHITENED_TX
/// Boolean to indicate whether the selected chip supports
/// canceling the frame-pending lookup event
/// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND
/// when the radio transitions to a state that renders the
/// the reporting of this event moot (i.e., too late for
/// the stack to influence the outgoing ACK).
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsCancelFramePendingLookup().
#if 1
#define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP.
#define RAIL_FEAT_IEEE802154_CANCEL_FP_LOOKUP_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_CANCEL_FRAME_PENDING_LOOKUP
/// Boolean to indicate whether the selected chip supports
/// early triggering of the frame-pending lookup event
/// \ref RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND
/// just after MAC address fields have been received.
/// See also runtime refinement \ref
/// RAIL_IEEE802154_SupportsEarlyFramePendingLookup().
#if 1
#define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP RAIL_SUPPORTS_PROTOCOL_IEEE802154
#else
#define RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP 0
#endif
/// Backwards-compatible synonym of \ref
/// RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP.
#define RAIL_FEAT_IEEE802154_EARLY_FP_LOOKUP_SUPPORTED \
RAIL_IEEE802154_SUPPORTS_EARLY_FRAME_PENDING_LOOKUP
/// Boolean to indicate whether the selected chip supports dual PA configs for mode switch
/// or concurrent mode.
/// See also runtime refinement \ref RAIL_IEEE802154_SupportsDualPaConfig().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 1
#else
#define RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG 0
#endif
/// Boolean to indicate whether the selected chip supports the pa power setting table.
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300))
#define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 1
#else
#define RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE 0
#endif
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip uses the common PA interface.
/// This feature is available when the configuration for Silicon Labs Series 3
/// devices is set to 1, enabling the use of a unified Power Amplifier (PA) interface
/// across different configurations.
#if (_SILICON_LABS_32B_SERIES_3_CONFIG >= 300)
#define RAIL_SUPPORTS_COMMON_PA_INTERFACE 1
#else
#define RAIL_SUPPORTS_COMMON_PA_INTERFACE 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports
/// IEEE802.15.4 2.4 GHz at 2 Mbps
/// See also runtime refinement \ref
/// RAIL_IEEE802154_Supports2MbpsPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300)
#define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY \
(RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_2MBPS_PHY 0
#endif
#endif //DOXYGEN_SHOULD_SKIP_THIS
/// Boolean to indicate whether the selected chip supports IEEE 802.15.4 PHY
/// with custom settings
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_1_CONFIG == 3))
#define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY (RAIL_SUPPORTS_PROTOCOL_IEEE802154 && RAIL_SUPPORTS_2P4GHZ_BAND)
#else
#define RAIL_IEEE802154_SUPPORTS_CUSTOM1_PHY 0
#endif
// Wi_SUN features
/// Boolean to indicate whether the selected chip supports
/// Wi-SUN
/// See also runtime refinement \ref
/// RAIL_SupportsProtocolWiSUN().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 5) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_WI_SUN 1
#else
#define RAIL_SUPPORTS_PROTOCOL_WI_SUN 0
#endif
// WMBUS features
/// Boolean to indicate whether the selected chip supports WMBUS simultaneous
/// M2O RX of T and C modes set by \ref RAIL_WMBUS_Config().
/// See also runtime refinement \ref RAIL_WMBUS_SupportsSimultaneousTCRx().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 1
#else
#define RAIL_WMBUS_SUPPORTS_SIMULTANEOUS_T_C_RX 0
#endif
// Z-Wave features
// Some features may not be available on all platforms
// due to radio hardware limitations.
/// Boolean to indicate whether the selected chip supports Z-Wave.
/// See also runtime refinement \ref RAIL_SupportsProtocolZWave().
#if ((_SILICON_LABS_32B_SERIES_1_CONFIG >= 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_ZWAVE RAIL_SUPPORTS_SUBGHZ_BAND
#else
#define RAIL_SUPPORTS_PROTOCOL_ZWAVE 0
#endif
/// Backwards-compatible synonym of \ref RAIL_SUPPORTS_PROTOCOL_ZWAVE.
#define RAIL_FEAT_ZWAVE_SUPPORTED RAIL_SUPPORTS_PROTOCOL_ZWAVE
/// Boolean to indicate whether the selected chip supports energy detect PHY.
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsEnergyDetectPhy().
#if (_SILICON_LABS_32B_SERIES_1_CONFIG >= 3)
#define RAIL_ZWAVE_SUPPORTS_ED_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_ED_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports concurrent PHY.
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsConcPhy().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_ZWAVE_SUPPORTS_CONC_PHY RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_CONC_PHY 0
#endif
/// Boolean to indicate whether the selected chip supports SQ-based PHY.
/// See also runtime refinement \ref RAIL_SupportsSQPhy().
#if (((_SILICON_LABS_32B_SERIES_2_CONFIG >= 3) \
&& (_SILICON_LABS_32B_SERIES_2_CONFIG != 7) \
&& (_SILICON_LABS_32B_SERIES_2_CONFIG != 9)) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
#define RAIL_SUPPORTS_SQ_PHY 1
#else
#define RAIL_SUPPORTS_SQ_PHY 0
#endif
/// Boolean to indicate whether the code supports Z-Wave
/// region information in PTI and
/// newer \ref RAIL_ZWAVE_RegionConfig_t structure
/// See also runtime refinement \ref RAIL_ZWAVE_SupportsRegionPti().
#if 1
#define RAIL_ZWAVE_SUPPORTS_REGION_PTI RAIL_SUPPORTS_PROTOCOL_ZWAVE
#else
#define RAIL_ZWAVE_SUPPORTS_REGION_PTI 0
#endif
/// Backwards-compatible synonym of \ref RAIL_ZWAVE_SUPPORTS_REGION_PTI.
#define RAIL_FEAT_ZWAVE_REGION_PTI RAIL_ZWAVE_SUPPORTS_REGION_PTI
/// Boolean to indicate whether the selected chip supports raw RX data
/// sources other than \ref RAIL_RxDataSource_t::RX_PACKET_DATA.
/// See also runtime refinement \ref RAIL_SupportsRxRawData().
#if (_SILICON_LABS_32B_SERIES_3_CONFIG == 0)
#define RAIL_SUPPORTS_RX_RAW_DATA 1
#else
#define RAIL_SUPPORTS_RX_RAW_DATA 0
#endif
/// Boolean to indicate whether the selected chip supports
/// direct mode.
/// See also runtime refinement \ref RAIL_SupportsDirectMode().
#if ((_SILICON_LABS_32B_SERIES == 1) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_DIRECT_MODE 1
#else
#define RAIL_SUPPORTS_DIRECT_MODE 0
#endif
/// Boolean to indicate whether the selected chip supports
/// RX direct mode data to FIFO.
/// See also runtime refinement \ref RAIL_SupportsRxDirectModeDataToFifo().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 1
#else
#define RAIL_SUPPORTS_RX_DIRECT_MODE_DATA_TO_FIFO 0
#endif
/// Boolean to indicate whether the selected chip supports
/// MFM protocol.
/// See also runtime refinement \ref RAIL_SupportsMfm().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_MFM 1
#else
#define RAIL_SUPPORTS_MFM 0
#endif
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 301) \
|| (_SILICON_LABS_32B_SERIES_3_CONFIG == 300))
/// Boolean to indicate whether the selected chip supports
/// 802.15.4 signal detection
#define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_IEEE802154)
/// Boolean to indicate whether the selected chip supports
/// BLE signal detection
#define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER (RAIL_SUPPORTS_PROTOCOL_BLE)
#else
/// Boolean to indicate whether the selected chip supports
/// 802.15.4 signal detection
#define RAIL_IEEE802154_SUPPORTS_SIGNAL_IDENTIFIER 0
/// Boolean to indicate whether the selected chip supports
/// BLE signal detection
#define RAIL_BLE_SUPPORTS_SIGNAL_IDENTIFIER 0
#endif
/// Boolean to indicate whether the selected chip supports
/// configurable RSSI threshold set by \ref RAIL_SetRssiDetectThreshold().
/// See also runtime refinement \ref RAIL_SupportsRssiDetectThreshold().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 5))
#define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (1U)
#else
#define RAIL_SUPPORTS_RSSI_DETECT_THRESHOLD (0U)
#endif
/// Boolean to indicate whether the selected chip supports
/// thermal protection set by \ref RAIL_ConfigThermalProtection().
/// See also runtime refinement \ref RAIL_SupportsThermalProtection().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_THERMAL_PROTECTION (1U)
#else
#define RAIL_SUPPORTS_THERMAL_PROTECTION (0U)
#endif
/// Boolean to indicate whether the selected chip supports fast RX-to-RX enabled by
/// \ref RAIL_RX_OPTION_FAST_RX2RX.
/// See also runtime refinement \ref RAIL_SupportsFastRx2Rx().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 2)
#define RAIL_SUPPORTS_FAST_RX2RX (1U)
#else
#define RAIL_SUPPORTS_FAST_RX2RX (0U)
#endif
/// Boolean to indicate whether the selected chip supports collision detection
/// enabled by \ref RAIL_RX_OPTION_ENABLE_COLLISION_DETECTION
/// See also runtime refinement \ref RAIL_SupportsCollisionDetection().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_COLLISION_DETECTION (1U)
#else
#define RAIL_SUPPORTS_COLLISION_DETECTION (0U)
#endif
/// Boolean to indicate whether the selected chip supports Sidewalk protocol.
/// See also runtime refinement \ref RAIL_SupportsProtocolSidewalk().
#if ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
#define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (1U)
#else
#define RAIL_SUPPORTS_PROTOCOL_SIDEWALK (0U)
#endif
/// Boolean to indicate whether the selected chip supports TrustZone secure
/// configuration of peripherals used by RAIL.
/// See also runtime refinement \ref RAIL_SupportsTrustZoneSecurePeripherals().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 3) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (1U)
#else
#define RAIL_SUPPORTS_TRUSTZONE_SECURE_PERIPHERALS (0U)
#endif
/// Boolean to indicate whether the selected chip supports automatic PRS LNA
/// bypass for external FEM.
/// See also runtime refinement \ref RAIL_SupportsPrsLnaBypass().
#if (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define RAIL_SUPPORTS_PRS_LNA_BYPASS (1U)
#else
#define RAIL_SUPPORTS_PRS_LNA_BYPASS (0U)
#endif
/** @} */ // end of group Features
/** @} */ // end of group RAIL_API
#ifdef __cplusplus
}
#endif
#endif // __RAIL_FEATURES_H__

View File

@@ -0,0 +1,193 @@
/***************************************************************************//**
* @file
* @brief The MFM specific header file for the RAIL library.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __RAIL_MFM_H__
#define __RAIL_MFM_H__
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/// @addtogroup MFM Multi-Level Frequency Modulation
/// @ingroup Protocol_Specific
/// @brief MFM configuration routines
///
/// @note This feature is only supported on EFR32xG23 devices.
///
/// This feature can be used to directly control the TX interpolation filter
/// input to allow for a more flexible frequency modulation scheme than the
/// standard MODEM. When doing this, the MFM buffer is treated as an array
/// of 8-bit signed data used as normalized frequency deviation to the SYNTH
/// frequency to directly control the interpolation filter input.
/// No support for frame handling, coding, nor shaping is supported.
/// Only compatible with FSK modulations.
///
/// The functions in this group configure RAIL Multi-Level Frequency Modulation (MFM)
/// hardware acceleration features.
///
/// To configure MFM functionality, the application must first set up
/// a RAIL instance with \ref RAIL_Init() and other setup functions.
/// Before enabling MFM, a ping-pong buffer (called buffer0 and buffer1
/// below) must be configured via \ref RAIL_SetMfmPingPongFifo() and
/// populated with the initial buffer content.
/// MFM is enabled by setting \ref RAIL_TxDataSource_t::TX_MFM_DATA using
/// \ref RAIL_ConfigData() and is activated when transmit is started by
/// \ref RAIL_StartTx(). Once transmitting the data in the ping-pong buffers,
/// RAIL will manage them so it looks like a continuous transmission to the
/// receiver. Every time one of the ping-pong buffers has been transmitted,
/// \ref RAIL_EVENT_MFM_TX_BUFFER_DONE is triggered so the application can
/// update the data in that buffer without the need to start/stop the
/// transmission. \ref RAIL_EVENT_MFM_TX_BUFFER_DONE can be enable with \ref
/// RAIL_ConfigEvents().
/// Use \ref RAIL_StopTx() to finish transmitting.
/// @code{.c}
/// #define MFM_RAW_BUF_WORDS 128
/// extern RAIL_Handle_t railHandle;
/// uint8_t txCount = 0;
/// uint32_t mfmPingPongBuffers[2][MFM_RAW_BUF_WORDS];
///
/// typedef struct mfmConfigApp {
/// RAIL_MFM_PingPongBufferConfig_t buffer;
/// RAIL_StateTiming_t timings;
/// RAIL_DataConfig_t dataConfig;
/// } mfmConfigApp_t;
///
/// static mfmConfigApp_t mfmConfig = {
/// .buffer = {
/// .pBuffer0 = (&mfmPingPongBuffers[0]),
/// .pBuffer1 = (&mfmPingPongBuffers[1]),
/// .bufferSizeWords = MFM_RAW_BUF_WORDS,
/// },
/// .timings = {
/// .idleToTx = 100,
/// .idleToRx = 0,
/// .rxToTx = 0,
/// .txToRx = 0,
/// .rxSearchTimeout = 0,
/// .txToRxSearchTimeout = 0
/// },
/// .dataConfig = {
/// .txSource = TX_MFM_DATA,
/// .rxSource = RX_PACKET_DATA,
/// .txMethod = PACKET_MODE,
/// .rxMethod = PACKET_MODE,
/// },
/// };
///
/// // Main RAIL events handler callback
/// static void RAILCb_Event(RAIL_Handle_t railHandle, RAIL_Events_t events)
/// {
/// // Increment TX counter
/// if (events & RAIL_EVENT_MFM_BUF_DONE) {
/// txCount++;
/// return;
/// }
/// }
/// }
///
/// void mfmInit(void)
/// {
/// // initialize MFM
/// uint32_t idx;
/// uint32_t *pDst0 = mfmConfig.buffer.pBuffer0;
/// uint32_t *pDst1 = mfmConfig.buffer.pBuffer1;
/// for (idx = 0; idx < (mfmConfig.buffer.bufferSizeWords / 4); idx++) {
/// pDst0[4 * idx + 0] = 0x755A3100;
/// pDst1[4 * idx + 0] = 0x755A3100;
/// pDst0[4 * idx + 1] = 0x315A757F;
/// pDst1[4 * idx + 1] = 0x315A757F;
/// pDst0[4 * idx + 2] = 0x8BA6CF00;
/// pDst1[4 * idx + 2] = 0x8BA6CF00;
/// pDst0[4 * idx + 3] = 0xCFA68B81;
/// pDst1[4 * idx + 3] = 0xCFA68B81;
/// }
///
/// RAIL_Status_t status;
/// status = RAIL_SetMfmPingPongFifo(railHandle, &mfmConfig.buffer);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// status = RAIL_SetStateTiming(railHandle, &mfmConfig.timings);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// mfmConfig.dataConfig.txSource = TX_MFM_DATA;
/// status = RAIL_ConfigData(railHandle, &mfmConfig.dataConfig);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// // start transmitting
/// status = RAIL_StartTx(railHandle, 0, 0, NULL);
/// assert(status == RAIL_STATUS_NO_ERROR);
/// }
///
/// void mfmDeInit(void)
/// {
/// RAIL_Status_t status;
/// status = RAIL_StopTx(railHandle, RAIL_STOP_MODES_ALL);
/// assert(status == RAIL_STATUS_NO_ERROR);
///
/// mfmConfig.dataConfig.txSource = TX_PACKET_DATA;
/// status = RAIL_ConfigData(railHandle, &mfmConfig.dataConfig);
/// assert(status == RAIL_STATUS_NO_ERROR);
/// }
/// @endcode
///
/// @{
/**
* @struct RAIL_MFM_PingPongBufferConfig_t
* @brief A configuration structure for MFM Ping-pong buffer in RAIL.
*/
typedef struct RAIL_MFM_PingPongBufferConfig {
/** Pointer to buffer 0. Must be 32-bit aligned. */
uint32_t *pBuffer0;
/** Pointer to buffer 1. Must be 32-bit aligned. */
uint32_t *pBuffer1;
/** Size of each buffer in 32-bit words. */
uint32_t bufferSizeWords;
} RAIL_MFM_PingPongBufferConfig_t;
/**
* Set MFM ping-pong buffer.
*
* @param[in] railHandle A handle of RAIL instance.
* @param[in] config A non-NULL pointer to the MFM ping-pong buffer configuration structure.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_SetMfmPingPongFifo(RAIL_Handle_t railHandle,
const RAIL_MFM_PingPongBufferConfig_t *config);
/** @} */ // end of MFM
#ifdef __cplusplus
}
#endif
#endif // __RAIL_MFM_H__

File diff suppressed because it is too large Load Diff