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GClarkson
2025-04-12 23:37:19 +01:00
parent 264a3462e0
commit 9d06f983af
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116
Libs/platform/radio/rail_lib/plugin/pa-conversions/efr32xg24/sl_rail_util_pa_curves_10dbm.h Normal file
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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __PA_CURVES_H_
#define __PA_CURVES_H_
#ifdef __cplusplus
extern "C" {
#endif
#define RAIL_PA_CURVES_PIECEWISE_SEGMENTS (9U)
#define RAIL_PA_CURVES_LP_VALUES (16U)
#define RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER 100
#define RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER -300
#define RAIL_PA_CURVES_2P4_HP_VBAT_CURVES \
{ { 255, 100, 22 }, \
{ 90, 1960, -116460 }, \
{ 36, 567, -7935 }, \
{ 22, 288, 6929 }, \
{ 16, 192, 9881 }, \
{ 11, 134, 10360 }, \
{ 8, 89, 9610 }, \
{ 6, 69, 8821 }, \
{ 4, 18, 5138 } }
#define RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER 0
#define RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER -260
#define RAIL_PA_CURVES_2P4_LP_VBAT_CURVES \
{ \
-252, /*! Power Level 0 */ \
-149, /*! Power Level 1 */ \
-97, /*! Power Level 2 */ \
-69, /*! Power Level 3 */ \
-52, /*! Power Level 4 */ \
-40, /*! Power Level 5 */ \
-32, /*! Power Level 6 */ \
-26, /*! Power Level 7 */ \
-22, /*! Power Level 8 */ \
-18, /*! Power Level 9 */ \
-15, /*! Power Level 10 */ \
-13, /*! Power Level 11 */ \
-11, /*! Power Level 12 */ \
-9, /*! Power Level 13 */ \
-8, /*! Power Level 14 */ \
-7, /*! Power Level 15 */ \
}
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHp = { \
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
#define RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT \
{ \
.curves = { \
{ \
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, \
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS, \
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX, \
.conversion = { .powerCurve = &RAIL_piecewiseDataHp }, \
}, \
{ \
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE, \
.segments = 0U, \
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX, \
.conversion = { .mappingTable = &RAIL_curves24Lp[0] }, \
}, \
} \
}
// *INDENT-OFF*
#ifdef __cplusplus
}
#endif
#endif

140
Libs/platform/radio/rail_lib/plugin/pa-conversions/efr32xg24/sl_rail_util_pa_curves_20dbm.h Normal file
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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __PA_CURVES_H_
#define __PA_CURVES_H_
#ifdef __cplusplus
extern "C" {
#endif
#define RAIL_PA_CURVES_PIECEWISE_SEGMENTS (8U)
#define RAIL_PA_CURVES_LP_VALUES (16U)
#define RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER 200
#define RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER -338
#define RAIL_PA_CURVES_2P4_HP_VBAT_CURVES \
{ { 180, 2280, -291457 }, \
{ 78, 770, -46749 }, \
{ 44, 431, -6673 }, \
{ 27, 255, 6886 }, \
{ 17, 167, 10458 }, \
{ 10, 98, 10261 }, \
{ 6, 59, 8616 }, \
{ 3, 11, 3745 } }
#define RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER 200
#define RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER -338
#define RAIL_PA_CURVES_2P4_HP_DCDC_CURVES \
{ { 180, 2263, -287605 }, \
{ 78, 783, -47869 }, \
{ 45, 432, -6351 }, \
{ 26, 255, 7104 }, \
{ 17, 167, 10595 }, \
{ 10, 98, 10336 }, \
{ 6, 59, 8671 }, \
{ 3, 11, 3757 } }
#define RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER 0
#define RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER -260
#define RAIL_PA_CURVES_2P4_LP_VBAT_CURVES \
{ \
-250, /*! Power Level 0 */ \
-148, /*! Power Level 1 */ \
-95, /*! Power Level 2 */ \
-68, /*! Power Level 3 */ \
-51, /*! Power Level 4 */ \
-40, /*! Power Level 5 */ \
-32, /*! Power Level 6 */ \
-26, /*! Power Level 7 */ \
-22, /*! Power Level 8 */ \
-18, /*! Power Level 9 */ \
-16, /*! Power Level 10 */ \
-13, /*! Power Level 11 */ \
-12, /*! Power Level 12 */ \
-10, /*! Power Level 13 */ \
-9, /*! Power Level 14 */ \
-9, /*! Power Level 15 */ \
}
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = { \
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
// Macro to declare the variables needed to initialize RAIL_TxPowerCurvesConfig_t for use in
// RAIL_InitTxPowerCurves, assuming battery powered operation
#define RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT \
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = { \
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER, \
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER, \
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES, \
}; \
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] = \
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
// *INDENT-OFF*
#define RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT \
{ \
.curves = { \
{ \
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, \
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS, \
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX, \
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat}, \
}, \
{ \
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE, \
.segments = 0U, \
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN, \
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX, \
.conversion = { .mappingTable = &RAIL_curves24Lp[0] }, \
}, \
} \
}
// *INDENT-OFF*
#ifdef __cplusplus
}
#endif
#endif

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Libs/platform/radio/rail_lib/plugin/pa-conversions/pa_conversions_efr32.c Normal file
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/***************************************************************************//**
* @file
* @brief PA power conversion functions provided to the customer as source for
* highest level of customization.
* @details This file contains the curves and logic that convert PA power
* levels to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
// For details on how to use this plugin, see
// https://www.silabs.com/documents/public/application-notes/an1127-power-amplifier-power-conversion-functions.pdf
#include "em_device.h"
#if defined(_SILICON_LABS_32B_SERIES_2) || defined(SIMULATION_DEVICE)
#include "em_cmu.h"
#else
#include "sl_clock_manager.h"
#endif
#include "pa_conversions_efr32.h"
#include "rail.h"
#define MAX(a, b) ((a) > (b) ? (a) : (b))
static RAIL_TxPowerCurvesConfigAlt_t powerCurvesState;
// Make sure SUPPORTED_PA_INDICES match the per-platform PA curves
// provided by RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT and resulting
// RAIL_TxPowerCurvesConfigAlt_t!
#ifndef SUPPORTED_PA_INDICES
#if defined(_SILICON_LABS_32B_SERIES_1)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
2U, /* SUBGIG_HP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 1)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
1U, /* 2P4GIG_MP */ \
2U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 2)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#define SUPPORTED_PA_INDICES { \
RAIL_NUM_PA, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
0U, /* SUBGIG_HP */ \
1U, /* SUBGIG_MP */ \
2U, /* SUBGIG_LP */ \
3U, /* SUBGIG_LLP */ \
/* The rest are unsupported */ \
}
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 4) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 6) || !defined(_SILICON_LABS_32B_SERIES_2))
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#define SUPPORTED_PA_INDICES { \
RAIL_NUM_PA, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
0U, /* SUBGIG_POWERSETTING_TABLE */ \
RAIL_NUM_PA, /* SUBGIG_HP */ \
RAIL_NUM_PA, /* SUBGIG_MP */ \
RAIL_NUM_PA, /* SUBGIG_LP */ \
RAIL_NUM_PA, /* SUBGIG_LLP */ \
RAIL_NUM_PA, /* SUBGIG_HIGHEST */ \
1U, /* OFDM_PA_POWERSETTING_TABLE */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 7)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
RAIL_NUM_PA, /* 2P4GIG_LP */ \
RAIL_NUM_PA, /* 2P4GIG_LLP */ \
RAIL_NUM_PA, /* 2P4GIG_HIGHEST */ \
RAIL_NUM_PA, /* SUBGIG_POWERSETTING_TABLE */ \
1U, /* SUBGIG_HP */ \
2U, /* SUBGIG_MP */ \
3U, /* SUBGIG_LP */ \
4U, /* SUBGIG_LLP */ \
/* The rest are unsupported */ \
}
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)
#define SUPPORTED_PA_INDICES { \
0U, /* 2P4GIG_HP */ \
RAIL_NUM_PA, /* 2P4GIG_MP */ \
1U, /* 2P4GIG_LP */ \
/* The rest are unsupported */ \
}
#else
#error "unknown platform"
#endif
#endif
static const uint8_t supportedPaIndices[] = SUPPORTED_PA_INDICES;
#if defined(_SILICON_LABS_32B_SERIES_1) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
#define PA_CONVERSION_MINIMUM_PWRLVL 1U
#else
#define PA_CONVERSION_MINIMUM_PWRLVL 0U
#endif
// This macro is defined when Silicon Labs builds this into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. The macro
// should *not* be defined in a customer build.
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurves_t *RAIL_GetTxPowerCurve(RAIL_TxPowerMode_t mode)
{
static RAIL_TxPowerCurves_t powerCurves;
RAIL_TxPowerLevel_t maxPowerLevel, minPowerLevel;
if (RAIL_SupportsTxPowerModeAlt(RAIL_EFR32_HANDLE,
&mode,
&maxPowerLevel,
&minPowerLevel)
&& (mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
const RAIL_PaDescriptor_t *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
const RAIL_TxPowerCurveAlt_t *curve = modeInfo->conversion.powerCurve;
// Check for an invalid power curve
if (curve == NULL) {
return NULL;
}
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
powerCurves.maxPower = modeInfo->maxPowerDbm;
powerCurves.minPower = modeInfo->minPowerDbm;
// Mapping table does not have RAIL_TxPowerCurveSegment_t segments
powerCurves.powerParams = NULL;
} else
#endif
{
powerCurves.maxPower = curve->maxPower;
powerCurves.minPower = curve->minPower;
powerCurves.powerParams = &curve->powerParams[0];
}
return &powerCurves;
}
return NULL;
}
// This function will not be supported for any parts after efr32xg1x
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_InitTxPowerCurves(const RAIL_TxPowerCurvesConfig_t *config)
{
#ifdef _SILICON_LABS_32B_SERIES_1
// First PA is 2.4 GHz high power, using a piecewise fit
RAIL_PaDescriptor_t *current = &powerCurvesState.curves[0];
current->algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR;
current->segments = config->piecewiseSegments;
current->min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN;
current->max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX;
static RAIL_TxPowerCurveAlt_t txPower2p4 = {
.minPower = 0U,
.maxPower = 0U,
.powerParams = { // The current max number of piecewise segments is 8
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
}
};
txPower2p4.maxPower = config->txPowerSgCurves->maxPower;
txPower2p4.minPower = config->txPowerSgCurves->minPower;
(void) memcpy(&txPower2p4.powerParams[0],
config->txPowerSgCurves->powerParams,
config->piecewiseSegments * sizeof(RAIL_TxPowerCurveSegment_t));
current->conversion.powerCurve = &txPower2p4;
// Second PA is 2.4 GHz low power, using a mapping table
current = &powerCurvesState.curves[1];
current->algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE;
current->segments = 0U;
current->min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN;
current->max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX;
current->conversion.mappingTable = config->txPower24LpCurves;
// Third and final PA is Sub-GHz, using a piecewise fit
current = &powerCurvesState.curves[2];
current->algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR;
current->segments = config->piecewiseSegments;
current->min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN;
current->max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX;
static RAIL_TxPowerCurveAlt_t txPowerSubGig = {
.minPower = 0U,
.maxPower = 0U,
.powerParams = { // The current max number of piecewise segments is 8
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
{ 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U }, { 0U, 0U, 0U },
}
};
txPowerSubGig.maxPower = config->txPowerSgCurves->maxPower;
txPowerSubGig.minPower = config->txPowerSgCurves->minPower;
(void) memcpy(&txPowerSubGig.powerParams[0],
config->txPowerSgCurves->powerParams,
config->piecewiseSegments * sizeof(RAIL_TxPowerCurveSegment_t));
current->conversion.powerCurve = &txPowerSubGig;
return RAIL_STATUS_NO_ERROR;
#else
(void) config;
return RAIL_STATUS_INVALID_CALL;
#endif
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_InitTxPowerCurvesAlt(const RAIL_TxPowerCurvesConfigAlt_t *config)
{
RAIL_Status_t status = RAIL_VerifyTxPowerCurves(config);
if (status == RAIL_STATUS_NO_ERROR) {
powerCurvesState = *config;
}
return status;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
const RAIL_PaPowerSetting_t *RAIL_GetPowerSettingTable(RAIL_Handle_t railHandle, RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *minPower, RAIL_TxPower_t *maxPower,
RAIL_TxPowerLevel_t *step)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
*minPower = modeInfo->minPowerDbm;
*maxPower = modeInfo->maxPowerDbm;
*step = modeInfo->step;
return (RAIL_PaPowerSetting_t*)(modeInfo->conversion.mappingTable);
}
return NULL;
#else
(void)mode;
(void)minPower;
(void)maxPower;
(void)step;
return NULL;
#endif
}
#endif // RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_ConvertDbmToPowerSettingEntry(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t power,
RAIL_TxPowerSettingEntry_t *powerSettingInfo)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
RAIL_TxPower_t minPower = modeInfo->minPowerDbm;
RAIL_TxPower_t maxPower = modeInfo->maxPowerDbm;
RAIL_TxPowerLevel_t step = modeInfo->step;
// Cap the power to within the range of the mapping table
if (power < minPower) {
power = minPower;
} else if (power > maxPower) {
power = maxPower;
} else {
// Power level is within bounds (MISRA required else)
}
// Calculate indices
uint32_t maxIndex = (uint32_t)((maxPower - minPower) / step);
uint32_t powerIndex = (uint32_t)((power - minPower) / step);
// Ensure powerIndex is within bounds
if (powerIndex > maxIndex) {
powerIndex = maxIndex;
}
RAIL_PaPowerSetting_t powerSetting = modeInfo->conversion.mappingTable[powerIndex];
while ((powerIndex > 0U)
&& (powerSetting == (RAIL_PaPowerSetting_t)modeInfo->conversion.mappingTable[powerIndex - 1U])) {
powerIndex--;
}
power = minPower + ((RAIL_TxPower_t)powerIndex * step);
powerSettingInfo->paPowerSetting = powerSetting;
powerSettingInfo->minPaPowerDdbm = minPower;
powerSettingInfo->maxPaPowerDdbm = maxPower;
powerSettingInfo->currentPaPowerDdbm = power;
return RAIL_STATUS_NO_ERROR;
}
}
return RAIL_STATUS_INVALID_CALL;
#else
(void) mode;
(void) power;
(void) powerSettingInfo;
return RAIL_STATUS_INVALID_CALL;
#endif //RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_TxPowerLevel_t RAIL_ConvertDbmToRaw(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t power)
{
(void)railHandle;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
// Powersetting tables do not have raw powerlevels.
// Could use RAIL_ConvertDbmToPowerSettingEntry
(void)mode;
(void) power;
#else
// When a channel dBm limitation greater than or equal to \ref RAIL_TX_POWER_MAX
// is converted to raw units, the max RAIL_TxPowerLevel_t will be
// returned. When compared to the current power level of the PA,
// it will always be greater, indicating that no power coercion
// is necessary to comply with channel limitations.
if (power >= RAIL_TX_POWER_MAX) {
return 255U;
}
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
uint32_t minPowerLevel = MAX(modeInfo->min, PA_CONVERSION_MINIMUM_PWRLVL);
// If we're in low power mode, just use the simple lookup table
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
// Binary search through the lookup table to find the closest power level
// without going over.
uint32_t lower = 0U;
// Track the high side of the estimate
uint32_t powerIndex = modeInfo->max - minPowerLevel;
while (lower < powerIndex) {
// Calculate the midpoint of the current range
uint32_t index = powerIndex - (powerIndex - lower) / 2U;
if (power < modeInfo->conversion.mappingTable[index]) {
powerIndex = index - 1U;
} else {
lower = index;
}
}
return (RAIL_TxPowerLevel_t)(powerIndex + minPowerLevel);
}
// Here we know we're using the piecewise linear conversion
RAIL_TxPowerCurveAlt_t const *paParams = modeInfo->conversion.powerCurve;
// Check for valid paParams before using them
if (paParams == NULL) {
return 0U;
}
// Cap the power based on the PA settings.
if (power > paParams->maxPower) {
// If we go above the maximum dbm the chip supports
// Then provide maximum powerLevel
power = paParams->maxPower;
} else if (power < paParams->minPower) {
// If we go below the minimum we want included in the curve fit, force it.
power = paParams->minPower;
} else {
// Do nothing, power is OK
}
// Map the power value to a 0 - 7 curveIndex value
//There are 8 segments of step size of RAIL_TX_POWER_CURVE_INCREMENT in deci dBm
//starting from maximum RAIL_TX_POWER_CURVE_MAX in deci dBm
// These are just starting points to give the code
// a rough idea of which segment to use, based on
// how they were fit. Adjustments are made later on
// if this turns out to be incorrect.
RAIL_TxPower_t txPowerMax = RAIL_TX_POWER_CURVE_DEFAULT_MAX;
RAIL_TxPower_t txPowerIncrement = RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT;
int16_t curveIndex = 0;
// if the first curve segment starts with RAIL_TX_POWER_LEVEL_INVALID
//It is an extra curve segment to depict the maxpower and increment
// (in deci-dBm) used while generating the curves.
// The extra segment is only present when curve segment is generated by
//using values different than the default - RAIL_TX_POWER_CURVE_DEFAULT_MAX
// and RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT.
if ((paParams->powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
curveIndex += 1;
txPowerMax = (RAIL_TxPower_t) paParams->powerParams[0].slope;
txPowerIncrement = (RAIL_TxPower_t) paParams->powerParams[0].intercept;
}
curveIndex += (txPowerMax - power) / txPowerIncrement;
if ((curveIndex > ((int16_t)modeInfo->segments - 1))
|| (curveIndex < 0)) {
curveIndex = ((int16_t)modeInfo->segments - 1);
}
uint32_t powerLevel;
do {
// Select the correct piecewise segment to use for conversion.
RAIL_TxPowerCurveSegment_t const *powerParams =
&paParams->powerParams[curveIndex];
// powerLevel can only go down to 0.
int32_t powerLevelInt = powerParams->intercept + ((int32_t)powerParams->slope * (int32_t)power);
if (powerLevelInt < 0) {
powerLevel = 0U;
} else {
powerLevel = (uint32_t) powerLevelInt;
}
// RAIL_LIB-8330: Modified from adding 500 to adding 92, this was tested on xg21 as being the highest
// number we can use without exceeding the requested power in dBm
powerLevel = ((powerLevel + 92U) / 1000U);
// In case it turns out the resultant power level was too low and we have
// to recalculate with the next curve...
curveIndex++;
} while ((curveIndex < (int16_t)modeInfo->segments)
&& (powerLevel <= paParams->powerParams[curveIndex].maxPowerLevel));
// We already know that curveIndex is at most modeInfo->segments
if (powerLevel > paParams->powerParams[curveIndex - 1].maxPowerLevel) {
powerLevel = paParams->powerParams[curveIndex - 1].maxPowerLevel;
}
// If we go below the minimum we want included in the curve fit, force it.
if (powerLevel < minPowerLevel) {
powerLevel = minPowerLevel;
}
return (RAIL_TxPowerLevel_t)powerLevel;
}
#endif // RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
return 0U;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_TxPower_t RAIL_ConvertRawToDbm(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPowerLevel_t powerLevel)
{
(void)railHandle;
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
// Limit the max power level
if (powerLevel > modeInfo->max) {
powerLevel = modeInfo->max;
}
// We 1-index low power PA power levels, but of course arrays are 0 indexed
powerLevel -= MAX(modeInfo->min, PA_CONVERSION_MINIMUM_PWRLVL);
//If the index calculation above underflowed, then provide the lowest array index.
if (powerLevel > (modeInfo->max - modeInfo->min)) {
powerLevel = 0U;
}
return modeInfo->conversion.mappingTable[powerLevel];
} else {
#if defined(_SILICON_LABS_32B_SERIES_1) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
// Although 0 is a legitimate power on non-2.4 LP PA's and can be set via
// "RAIL_SetTxPower(railHandle, 0)" it is MUCH lower than power
// level 1 (approximately -50 dBm). Including it in the piecewise
// linear fit would skew the curve substantially, so we exclude it
// from the conversion.
if (powerLevel == 0U) {
return -500;
}
#endif
RAIL_TxPowerCurveAlt_t const *powerCurve = modeInfo->conversion.powerCurve;
// Check for a valid powerCurve pointer before using it
if (powerCurve == NULL) {
return RAIL_TX_POWER_MIN;
}
RAIL_TxPowerCurveSegment_t const *powerParams = powerCurve->powerParams;
// Hard code the extremes (i.e. don't use the curve fit) in order
// to make it clear that we are reaching the extent of the chip's
// capabilities
if (powerLevel <= modeInfo->min) {
return powerCurve->minPower;
} else if (powerLevel >= modeInfo->max) {
return powerCurve->maxPower;
} else {
// Power level is within bounds (MISRA required else)
}
// Figure out which parameter to use based on the power level
uint8_t x = 0;
uint8_t upperBound = modeInfo->segments - 1U;
// If the first curve segment starts with RAIL_TX_POWER_LEVEL_INVALID,
// then it is an additional curve segment that stores maxpower and increment
// (in deci-dBm) used to generate the curves.
// The extra info segment is present only if the curves were generated using
// values other than default - RAIL_TX_POWER_CURVE_DEFAULT_MAX and
// RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT.
if ((powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
x = 1U; // skip over the first entry
}
for (; x < upperBound; x++) {
if (powerParams[x + 1U].maxPowerLevel < powerLevel) {
break;
}
}
int32_t power;
power = ((1000 * (int32_t)(powerLevel)) - powerParams[x].intercept);
power = ((power + ((int32_t)powerParams[x].slope / 2)) / (int32_t)powerParams[x].slope);
if (power > powerCurve->maxPower) {
return powerCurve->maxPower;
} else if (power < powerCurve->minPower) {
return powerCurve->minPower;
} else {
return (RAIL_TxPower_t)power;
}
}
}
return RAIL_TX_POWER_MIN;
}
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
RAIL_Status_t RAIL_GetTxPowerCurveLimits(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *maxPower,
RAIL_TxPower_t *increment)
{
(void)railHandle;
if ((mode < sizeof(supportedPaIndices))
&& (supportedPaIndices[mode] < RAIL_NUM_PA)) {
RAIL_PaDescriptor_t const *modeInfo = &powerCurvesState.curves[supportedPaIndices[mode]];
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE) {
*maxPower = modeInfo->maxPowerDbm;
*increment = modeInfo->step;
return RAIL_STATUS_NO_ERROR;
}
#endif
//The power max info only for available Linear fit
if (modeInfo->algorithm == RAIL_PA_ALGORITHM_MAPPING_TABLE) {
return RAIL_STATUS_INVALID_CALL;
}
*maxPower = RAIL_TX_POWER_CURVE_DEFAULT_MAX;
*increment = RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT;
RAIL_TxPowerCurveAlt_t const *paParams = modeInfo->conversion.powerCurve;
if ((paParams->powerParams[0].maxPowerLevel) == RAIL_TX_POWER_LEVEL_INVALID) {
*maxPower = paParams->powerParams[0].slope;
*increment = (RAIL_TxPower_t)paParams->powerParams[0].intercept;
}
return RAIL_STATUS_NO_ERROR;
}
return RAIL_STATUS_INVALID_PARAMETER;
}
// This macro is defined when Silicon Labs builds curves into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#if !defined(RAIL_PA_CONVERSIONS_WEAK) && !defined(HAL_CONFIG)
#include "sl_rail_util_pa_config.h"
void sl_rail_util_pa_init(void)
{
#if SL_RAIL_UTIL_PA_VOLTAGE_MV > 1800
(void)RAIL_InitTxPowerCurvesAlt(&RAIL_TxPowerCurvesVbat);
#else
(void)RAIL_InitTxPowerCurvesAlt(&RAIL_TxPowerCurvesDcdc);
#endif
#if SL_RAIL_UTIL_PA_CALIBRATION_ENABLE
RAIL_EnablePaCal(true);
#else
RAIL_EnablePaCal(false);
#endif
}
#if RAIL_SUPPORTS_2P4GHZ_BAND
static RAIL_TxPowerConfig_t txPowerConfig2p4Ghz = {
.mode = SL_RAIL_UTIL_PA_SELECTION_2P4GHZ,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
.rampTime = SL_RAIL_UTIL_PA_RAMP_TIME_US,
};
#endif
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_2p4ghz(void)
{
#if RAIL_SUPPORTS_2P4GHZ_BAND
return &txPowerConfig2p4Ghz;
#else
return NULL;
#endif
}
#if RAIL_SUPPORTS_SUBGHZ_BAND
static RAIL_TxPowerConfig_t txPowerConfigSubGhz = {
.mode = SL_RAIL_UTIL_PA_SELECTION_SUBGHZ,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
.rampTime = SL_RAIL_UTIL_PA_RAMP_TIME_US,
};
#endif
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_subghz(void)
{
#if RAIL_SUPPORTS_SUBGHZ_BAND
return &txPowerConfigSubGhz;
#else
return NULL;
#endif
}
#if RAIL_SUPPORTS_OFDM_PA
#ifndef SL_RAIL_UTIL_PA_SELECTION_OFDM
#define SL_RAIL_UTIL_PA_SELECTION_OFDM RAIL_TX_POWER_MODE_OFDM_PA_POWERSETTING_TABLE
#endif
static RAIL_TxPowerConfig_t txPowerConfigOFDM = {
.mode = SL_RAIL_UTIL_PA_SELECTION_OFDM,
.voltage = SL_RAIL_UTIL_PA_VOLTAGE_MV,
};
#endif // RAIL_SUPPORTS_OFDM_PA
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_ofdm(void)
{
#if RAIL_SUPPORTS_OFDM_PA
return &txPowerConfigOFDM;
#else
return NULL;
#endif // RAIL_SUPPORTS_OFDM_PA
}
void sl_rail_util_pa_on_channel_config_change(RAIL_Handle_t rail_handle,
const RAIL_ChannelConfigEntry_t *entry)
{
if (!RAIL_IsPaAutoModeEnabled(rail_handle)) {
RAIL_TxPowerConfig_t currentTxPowerConfig;
RAIL_TxPowerConfig_t *newTxPowerConfigPtr;
RAIL_Status_t status;
// Get current TX Power Config.
status = RAIL_GetTxPowerConfig(rail_handle, &currentTxPowerConfig);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't get TX Power Config
}
#if RAIL_SUPPORTS_DUAL_BAND
// Determine new TX Power Config.
if (entry->baseFrequency < 1000000000UL) {
newTxPowerConfigPtr = &txPowerConfigSubGhz;
} else {
newTxPowerConfigPtr = &txPowerConfig2p4Ghz;
}
#else
(void) entry;
#if RAIL_SUPPORTS_2P4GHZ_BAND
newTxPowerConfigPtr = &txPowerConfig2p4Ghz;
#else
newTxPowerConfigPtr = &txPowerConfigSubGhz;
#endif
#endif
#if RAIL_IEEE802154_SUPPORTS_DUAL_PA_CONFIG
if (currentTxPowerConfig.mode == RAIL_TX_POWER_MODE_NONE) {
#if RAIL_SUPPORTS_OFDM_PA
if (RAIL_SupportsTxPowerModeAlt(rail_handle,
&txPowerConfigOFDM.mode,
NULL, NULL)) {
// Apply OFDM Power Config.
status = RAIL_ConfigTxPower(rail_handle, &txPowerConfigOFDM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Set default TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, SL_RAIL_UTIL_PA_POWER_DECI_DBM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
}
#endif // RAIL_SUPPORTS_OFDM_PA
// Apply FSK Power Config.
status = RAIL_ConfigTxPower(rail_handle, newTxPowerConfigPtr);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Set default TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, SL_RAIL_UTIL_PA_POWER_DECI_DBM);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
}
#else
// Call RAIL_ConfigTxPower only if TX Power Config mode has changed.
if (currentTxPowerConfig.mode != newTxPowerConfigPtr->mode) {
// Save current TX power before RAIL_ConfigTxPower (because not preserved).
RAIL_TxPower_t txPowerDeciDbm;
if (currentTxPowerConfig.mode == RAIL_TX_POWER_MODE_NONE) {
txPowerDeciDbm = SL_RAIL_UTIL_PA_POWER_DECI_DBM;
} else {
txPowerDeciDbm = RAIL_GetTxPowerDbm(rail_handle);
}
// Apply new TX Power Config.
status = RAIL_ConfigTxPower(rail_handle, newTxPowerConfigPtr);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power Config
}
// Restore TX power after RAIL_ConfigTxPower.
status = RAIL_SetTxPowerDbm(rail_handle, txPowerDeciDbm);
if (status != RAIL_STATUS_NO_ERROR) {
while (true) {
} // Error: Can't set TX Power
}
// If requested a HIGHEST setting, update it with the real one selected
// to short-circuit the next time through here since HIGHEST never
// matches the real PA returned by RAIL_GetTxPowerConfig(), causing
// reconfiguration of the same PA on every callback.
if (false
#ifdef RAIL_TX_POWER_MODE_2P4GIG_HIGHEST
|| (newTxPowerConfigPtr->mode == RAIL_TX_POWER_MODE_2P4GIG_HIGHEST)
#endif
#ifdef RAIL_TX_POWER_MODE_SUBGIG_HIGHEST
|| (newTxPowerConfigPtr->mode == RAIL_TX_POWER_MODE_SUBGIG_HIGHEST)
#endif
) {
(void) RAIL_GetTxPowerConfig(rail_handle, &currentTxPowerConfig);
newTxPowerConfigPtr->mode = currentTxPowerConfig.mode;
}
}
#endif
} // !RAIL_IsPaAutoModeEnabled
}
#endif // !RAIL_PA_CONVERSIONS_WEAK

188
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/***************************************************************************//**
* @file
* @brief PA power conversion functions provided to the customer as source for
* highest level of customization.
* @details This file contains the curves and logic that convert PA power
* levels to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CONVERSIONS_EFR32_H
#define PA_CONVERSIONS_EFR32_H
#include "rail_types.h"
// This macro is defined when Silicon Labs builds curves into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#ifndef RAIL_PA_CONVERSIONS_WEAK
#ifdef SL_RAIL_UTIL_PA_CONFIG_HEADER
#include SL_RAIL_UTIL_PA_CONFIG_HEADER
#else
#include "sl_rail_util_pa_conversions_efr32_config.h"
#endif
#endif
#ifdef HAL_CONFIG
#include "hal-config.h"
#ifdef HAL_PA_CURVE_HEADER
#ifdef SL_RAIL_UTIL_PA_CURVE_HEADER
#undef SL_RAIL_UTIL_PA_CURVE_HEADER
#endif
#define SL_RAIL_UTIL_PA_CURVE_HEADER HAL_PA_CURVE_HEADER
#endif
#endif
#ifdef SL_RAIL_UTIL_PA_CURVE_TYPES
#include SL_RAIL_UTIL_PA_CURVE_TYPES
#else
#include "pa_curve_types_efr32.h"
#endif
#ifdef SL_RAIL_UTIL_PA_CURVE_HEADER
#include SL_RAIL_UTIL_PA_CURVE_HEADER
#else
#include "pa_curves_efr32.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup PA_Curve_Conversions PA Curve Conversions
* @ingroup PA
* @{
*/
/// The curves to be used when battery voltage powers transmission
extern const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat;
/// The curves to be used when the DC-DC converter powers transmission
extern const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc;
/**
* Initialize Transmit power curves.
*
* @param[in] config A pointer to the custom TX power curves.
* @return Status code indicating success of the function call.
*
* @deprecated function is no longer supported.
* Must use \ref RAIL_InitTxPowerCurvesAlt() instead.
*/
RAIL_Status_t RAIL_InitTxPowerCurves(const RAIL_TxPowerCurvesConfig_t *config);
/**
* Initialize TxPower curves.
*
* @param[in] config A pointer to the custom TX power curves to use.
* @return Status code indicating success of the function call.
*/
RAIL_Status_t RAIL_InitTxPowerCurvesAlt(const RAIL_TxPowerCurvesConfigAlt_t *config);
/**
* Gets the curve that should be used for conversion functions based on the
* current PA configuration.
*
* @param[in] mode PA mode whose curves are needed.
* @return A pointer to the \ref RAIL_TxPowerCurves_t that are used for conversion functions.
*
* @note: If the mode is not supported by the the chip,
* then NULL will be returned.
*/
RAIL_TxPowerCurves_t const *RAIL_GetTxPowerCurve(RAIL_TxPowerMode_t mode);
/**
* Gets the maximum power in deci-dBm that should be used for calculating
* the segments and to find right curve segment to convert Dbm to raw power
* level for a specific PA.
*
* @param[in] railHandle A RAIL instance handle.
* @param[in] mode PA mode whose curves are needed.
* @param[out] maxpower A non-NULL pointer to memory allocated to hold
* the max power in deci-dBm used in calculation of curve segments.
* @param[out] increment A non-NULL pointer to memory allocated to hold
* the increment in deci-dBm used in calculation of curve segments.
* @return Status code indicating success of the function call.
*
* For the PAs with \ref RAIL_PaConversionAlgorithm_t
* \ref RAIL_PA_ALGORITHM_PIECEWISE_LINEAR, if the curves are generated with
* maxPower and increment other than \ref RAIL_TX_POWER_CURVE_DEFAULT_MAX and
* \ref RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT respectively, then the first
* \ref RAIL_TxPowerCurveSegment_t has its maxPowerLevel equal to
* \ref RAIL_TX_POWER_LEVEL_INVALID and its slope and intercept stores the
* maxPower and increment in deci-dBm respectively.
*/
RAIL_Status_t RAIL_GetTxPowerCurveLimits(RAIL_Handle_t railHandle,
RAIL_TxPowerMode_t mode,
RAIL_TxPower_t *maxpower,
RAIL_TxPower_t *increment);
/**
* Initialize PA TX Curves.
*/
void sl_rail_util_pa_init(void);
/**
* Get a pointer to the TX Power Config 2.4 GHz structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_2p4ghz(void);
/**
* Get a pointer to the TX Power Config Sub-GHz structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_subghz(void);
/**
* Get a pointer to the TX Power Config OFDM structure.
*
* @return A pointer to the TX Power Config stucture.
*/
RAIL_TxPowerConfig_t *sl_rail_util_pa_get_tx_power_config_ofdm(void);
/**
* Provide a channel config change callback capable of configuring the PA
* correctly.
*
* @param[in] rail_handle The RAIL handle being passed into this callback.
* @param[in] entry A pointer to the channel config entry being switched
* to by hardware.
*/
void sl_rail_util_pa_on_channel_config_change(RAIL_Handle_t rail_handle,
const RAIL_ChannelConfigEntry_t *entry);
/** @} */ // PA_Curve_Conversions
#ifdef __cplusplus
}
#endif
#endif // PA_CONVERSIONS_EFR32_H

290
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/***************************************************************************//**
* @file
* @brief PA power conversion curve types used by Silicon Labs PA power
* conversion functions.
* @details This file contains the curve types needed convert PA power levels
* to dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CURVE_TYPES_EFR32_H
#define PA_CURVE_TYPES_EFR32_H
#include "rail_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup PA_Curve_Conversions PA Curve Conversions
* @ingroup PA
* @{
*/
/**
* @struct RAIL_TxPowerCurveSegment_t
*
* @brief Structure containing data defining each segment of the
* deci-dBm to raw power level mapping curve fits.
*
* Note, these used in an equation of the form:
*
* powerLevel * 1000 = slope * power + intercept
*
* powerLevel is the 0-252/0-248/1-7 values used in the RAIL_Get/SetTxPower()
* functions, and power is the actual output power of the PA, specified
* in deci-dBm.
*
* @note If the curves are generated with
* maxPower and increment other than \ref RAIL_TX_POWER_CURVE_DEFAULT_MAX and
* \ref RAIL_TX_POWER_CURVE_DEFAULT_INCREMENT respectively, then the first
* \ref RAIL_TxPowerCurveSegment_t has its maxPowerLevel equal to
* \ref RAIL_TX_POWER_LEVEL_INVALID and its slope and intercept stores the
* maxPower and increment in deci-dBm respectively.
*/
typedef struct RAIL_TxPowerCurveSegment {
/** The highest power level that this segment will be used to convert */
uint16_t maxPowerLevel;
/** slope of the line */
int16_t slope;
/** y-intercept of the line */
int32_t intercept;
} RAIL_TxPowerCurveSegment_t;
/**
* @struct RAIL_TxPowerCurves_t
*
* @brief Structure containing the min and max values for a given
* PA and voltage supply combination (in deci-dBm).
*/
typedef struct RAIL_TxPowerCurves {
/** max deci-dBm value */
int16_t maxPower;
/** min deci-dBm value */
int16_t minPower;
/**
* Pointer to an array of \ref RAIL_TxPowerCurvesConfig_t::piecewiseSegments
* elements of \ref RAIL_TxPowerCurveSegment_t for deci-dBm to raw
* power level conversion fits.
*/
const RAIL_TxPowerCurveSegment_t *powerParams;
} RAIL_TxPowerCurves_t;
/**
* @struct RAIL_TxPowerCurvesConfig_t
*
* @brief Structure containing curve fit information and other metadata
* required to properly use the WEAK versions of RAIL_ConvertRawToDb
* and RAIL_ConvertDbmToRaw.
*/
typedef struct RAIL_TxPowerCurvesConfig {
/**
* Pointer a RAIL_TxPowerCurves_t representing the piecewise linear segments
* of curves that map power level to power in dBm for the 2.4 GHz high power
* PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurves_t *txPower24HpCurves;
/**
* Pointer a RAIL_TxPowerCurves_t representing the piecewise linear segments
* of curves that map power level to power in dBm for the subgig PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurves_t *txPowerSgCurves;
/**
* Look up table for each of the power levels of the 2.4GHz low power
* amplifier and their equivalent deci-dB value.
*/
const int16_t *txPower24LpCurves;
/**
* The number of piecewise segments provided to the PA in each of the four
* conversion curve fits. The default is 8, but regardless of the number, it
* must be the same for all curves.
*/
uint8_t piecewiseSegments;
} RAIL_TxPowerCurvesConfig_t;
/**
* @enum RAIL_PaConversionAlgorithm_t
* @brief PA conversion algorithms types for converting between dBm and power levels
*/
RAIL_ENUM(RAIL_PaConversionAlgorithm_t) {
/** Piecewise linear fit */
RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
/** Mapping table between quantities */
RAIL_PA_ALGORITHM_MAPPING_TABLE,
/** Mapping table between pa power settings and dBm values */
RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE,
};
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// Self-referencing defines minimize compiler complaints when using RAIL_ENUM
#define RAIL_PA_ALGORITHM_PIECEWISE_LINEAR ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_PIECEWISE_LINEAR)
#define RAIL_PA_ALGORITHM_MAPPING_TABLE ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_MAPPING_TABLE)
#define RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE ((RAIL_PaConversionAlgorithm_t) RAIL_PA_ALGORITHM_DBM_POWERSETTING_MAPPING_TABLE)
#endif//DOXYGEN_SHOULD_SKIP_THIS
/**
* @struct RAIL_TxPowerCurveAlt_t
*
* @brief Structure containing the min and max values for a given
* PA and voltage supply combination (in deci-dBm).
*/
typedef struct RAIL_TxPowerCurveAlt {
/** max deci-dBm value */
int16_t maxPower;
/** min deci-dBm value */
int16_t minPower;
/**
* Array of \ref RAIL_PaDescriptor_t::segments \ref RAIL_TxPowerCurveSegment_t
* structures for the deci-dBm to raw power level conversion fits.
*/
//Array does not have a size since it can be various sizes.
//No further fields allowed after this one.
RAIL_TxPowerCurveSegment_t powerParams[];
} RAIL_TxPowerCurveAlt_t;
#ifndef DOXYGEN_SHOULD_SKIP_THIS
#if defined(SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION)
#if RAIL_SUPPORTS_COMMON_PA_INTERFACE
#if SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION == 1
/// The entry in the powersetting table have the below bitfields
/// |15-14 =sub-mode|13-8:unused|7-0:scalor(stripe+slice)|
/// Mask for submode
#define SLI_RAIL_UTIL_PA_TABLE_SUBMODE_MASK 0xC000UL
/// Shift for submode
#define SLI_RAIL_UTIL_PA_TABLE_SUBMODE_SHIFT 14U
/// Mask for scalor
#define SLI_RAIL_UTIL_PATABLE_SCALOR_MASK 0xFFU
/// Shift for scalor
#define SLI_RAIL_UTIL_PA_TABLE_SCALOR_SHIFT 0U
#endif //SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION == 1
#endif //RAIL_SUPPORTS_COMMON_PA_INTERFACE
#endif //defined(SL_RAIL_UTIL_PA_POWERSETTING_TABLE_VERSION)
#endif //DOXYGEN_SHOULD_SKIP_THIS
/**
* @struct RAIL_PowerConversion_t
*
* @brief Union containing a pointer to algorithm-specific conversion data.
*/
typedef union RAIL_PowerConversion {
/**
* Pointer to a powerCurve containing line segment data for the curves
* corresponding to a specific PA.
*
* @note By the default conversion implementation, segments must be specified
* in decreasing power order. That is, the 0th entry of this array should be
* used to convert the highest power (levels). Segment at position n is valid
* from maxPowerLevel+1 from the segment at n+1 (or 0 if n is array length - 1)
* to maxPowerLevel of segment n, inclusive.
*/
const RAIL_TxPowerCurveAlt_t *powerCurve;
/**
* Lookup table for PA's which use the mapping table algorithm for converting
* between deci-dBm and power levels.
*/
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
#if RAIL_SUPPORTS_COMMON_PA_INTERFACE
const int16_t *mappingTable;
#else
const int32_t *mappingTable;
#endif
#else
const int16_t *mappingTable;
#endif
} RAIL_PowerConversion_t;
/**
* @struct RAIL_PaDescriptor_t
*
* @brief Struct containing specifics of PA configuration.
* PA descriptor as used in the PA conversion functions.
*/
typedef struct RAIL_PaDescriptor {
/** Algorithm used to map dBm to power levels for this PA. */
RAIL_PaConversionAlgorithm_t algorithm;
/**
* The number of piecewise segments provided to the PA in a piecewise linear
* curve fit. The default is 8. Should be set to 0 when not using the
* piecewise linear algorithm.
*/
uint8_t segments;
/** Min power level for this PA. */
RAIL_TxPowerLevel_t min;
/** Max power level for this PA. */
RAIL_TxPowerLevel_t max;
#if RAIL_SUPPORTS_DBM_POWERSETTING_MAPPING_TABLE
/** step size in deci-dBm between entries in table. */
RAIL_TxPowerLevel_t step;
/** structure padding. */
uint8_t padding;
/** structure padding. */
uint16_t padding2;
/** Min power in deci-dBm for this PA. */
RAIL_TxPower_t minPowerDbm;
/** Max power in deci-dBm for this PA. */
RAIL_TxPower_t maxPowerDbm;
#endif
/** Union containing a pointer to algorithm-specific conversion data. */
RAIL_PowerConversion_t conversion;
} RAIL_PaDescriptor_t;
/**
* @struct RAIL_TxPowerCurvesConfigAlt_t
*
* @brief More generic structure containing information about
* piecewise linear curves and mapping tables, instead of specific PA's.
*/
typedef struct RAIL_TxPowerCurvesConfigAlt {
/** The curves for each PA. */
RAIL_PaDescriptor_t curves[RAIL_NUM_PA];
/** Signature used for validation of the curves configuruation. */
uint32_t signature;
/** PA VDD voltage, in millivolts. */
uint16_t paVoltage;
} RAIL_TxPowerCurvesConfigAlt_t;
/** @} */ // PA_Curve_Conversions
#ifdef __cplusplus
}
#endif
#endif // PA_CURVE_TYPES_EFR32_H

383
Libs/platform/radio/rail_lib/plugin/pa-conversions/pa_curves_efr32.c Normal file
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@@ -0,0 +1,383 @@
/***************************************************************************//**
* @file
* @brief Default PA power conversion structures with curves calibrated by the
* RAIL team.
* @details This file contains the curves that convert PA power levels to dBm
* powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
// This entire file should never be used on FCC pre-certified modules
#ifndef _SILICON_LABS_MODULE
#include "em_device.h"
#include "pa_conversions_efr32.h"
#if defined(_SILICON_LABS_32B_SERIES_1)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataSgVbat = {
RAIL_PA_CURVES_SG_VBAT_MAX_POWER,
RAIL_PA_CURVES_SG_VBAT_MIN_POWER,
RAIL_PA_CURVES_SG_VBAT_CURVES
};
static const int16_t RAIL_curves24LpVbat[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP;
// This macro is defined when Silicon Labs builds this into the library as WEAK
// to ensure it can be overriden by customer versions of these functions. It
// should *not* be defined in a customer build.
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24LpVbat[0] },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN,
.max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataSgVbat },
},
},
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = {
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataSgDcdc = {
RAIL_PA_CURVES_SG_DCDC_MAX_POWER,
RAIL_PA_CURVES_SG_DCDC_MIN_POWER,
RAIL_PA_CURVES_SG_DCDC_CURVES
};
static const int16_t RAIL_curves24LpDcdc[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpDcdc },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24LpDcdc[0] },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_2P4_HP_SG_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_SUBGIG_MIN,
.max = RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataSgDcdc },
},
},
};
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 2) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 7) \
|| (_SILICON_LABS_32B_SERIES_2_CONFIG == 9))
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#elif ((_SILICON_LABS_32B_SERIES_2_CONFIG == 3) || (_SILICON_LABS_32B_SERIES_2_CONFIG == 8))
RAIL_DECLARE_TX_POWER_VBAT_CURVES_ALT;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_5)
static const int32_t RAIL_curvesOFDM[RAIL_PA_CURVES_OFDM_CURVES_NUM_VALUES] =
RAIL_PA_CURVES_OFDM_CURVES;
static const int32_t RAIL_curvesSubgig[RAIL_PA_CURVES_SUBGIG_CURVES_NUM_VALUES] =
RAIL_PA_CURVES_SUBGIG_CURVES;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_1)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataMpVbat = {
RAIL_PA_CURVES_2P4_MP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_MP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_MP_VBAT_CURVES,
};
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataLpVbat = {
RAIL_PA_CURVES_2P4_LP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_LP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_LP,
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_MP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_MP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataMpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataLpVbat },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_MP_MIN,
.max = RAIL_TX_POWER_LEVEL_MP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataMpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_LP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataLpVbat },
},
}
};
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_4) || defined(_SILICON_LABS_32B_SERIES_2_CONFIG_6)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpVbat = {
RAIL_PA_CURVES_2P4_HP_VBAT_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_VBAT_CURVES,
};
#if defined(RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT)
static const RAIL_TxPowerCurveAlt_t RAIL_piecewiseDataHpDcdc = {
RAIL_PA_CURVES_2P4_HP_DCDC_MAX_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_MIN_POWER,
RAIL_PA_CURVES_2P4_HP_DCDC_CURVES,
};
#endif
static const int16_t RAIL_curves24Lp[RAIL_PA_CURVES_LP_VALUES] =
RAIL_PA_CURVES_2P4_LP_VBAT_CURVES;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = {
.curves = {
{
.algorithm = RAIL_PA_ALGORITHM_PIECEWISE_LINEAR,
.segments = RAIL_PA_CURVES_PIECEWISE_SEGMENTS,
.min = RAIL_TX_POWER_LEVEL_2P4_HP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_HP_MAX,
#if defined(RAIL_DECLARE_TX_POWER_DCDC_CURVES_ALT)
.conversion = { .powerCurve = &RAIL_piecewiseDataHpDcdc },
#else
.conversion = { .powerCurve = &RAIL_piecewiseDataHpVbat },
#endif
},
{
.algorithm = RAIL_PA_ALGORITHM_MAPPING_TABLE,
.segments = 0U,
.min = RAIL_TX_POWER_LEVEL_2P4_LP_MIN,
.max = RAIL_TX_POWER_LEVEL_2P4_LP_MAX,
.conversion = { .mappingTable = &RAIL_curves24Lp[0] },
},
}
};
#elif !defined(_SILICON_LABS_32B_SERIES_2)
static const int16_t RAIL_curves10dbm[RAIL_PA_CURVES_COMMON_INTERFACE_10DBM_NUM_VALUES] =
RAIL_PA_CURVES_COMMON_INTERFACE_10DBM_CURVES;
static const int16_t RAIL_curves0dbm[RAIL_PA_CURVES_COMMON_INTERFACE_0DBM_NUM_VALUES] =
RAIL_PA_CURVES_COMMON_INTERFACE_0DBM_CURVES;
// This chip has the same curve for Vbat and DCDC
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesVbat = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#ifdef RAIL_PA_CONVERSIONS_WEAK
__WEAK
#endif
const RAIL_TxPowerCurvesConfigAlt_t RAIL_TxPowerCurvesDcdc = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
#else
#error "Unsupported platform!"
#endif
#endif //_SILICON_LABS_MODULE

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/***************************************************************************//**
* @file
* @brief PA power conversion curves used by Silicon Labs PA power conversion
* functions.
* @details This file contains the curves needed convert PA power levels to
* dBm powers.
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef PA_CURVES_EFR32_H
#define PA_CURVES_EFR32_H
#ifdef __cplusplus
extern "C" {
#endif
#include "em_device.h"
#ifdef _SILICON_LABS_32B_SERIES_1
#include "efr32xg1x/sl_rail_util_pa_curves.h"
#elif defined (_SILICON_LABS_32B_SERIES_2_CONFIG_1)
#include "efr32xg21/sl_rail_util_pa_curves.h"
#elif defined(_SILICON_LABS_32B_SERIES_2_CONFIG_2)
#include "efr32xg22/sl_rail_util_pa_curves.h"
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 3)
#if defined(_SILICON_LABS_EFR32_SUBGHZ_HP_PA_PRESENT)
#if (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 20)
#include "efr32xg23/sl_rail_util_pa_curves_20dbm.h"
#elif (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 10)
#include "efr32xg23/sl_rail_util_pa_curves_10dbm_434M.h"
#else
#include "efr32xg23/sl_rail_util_pa_curves_14dbm.h"
#endif
#else
#error "No valid PA available for selected chip."
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 8)
#if defined(_SILICON_LABS_EFR32_SUBGHZ_HP_PA_PRESENT)
#if (_SILICON_LABS_EFR32_SUBGHZ_HP_PA_MAX_OUTPUT_DBM == 20)
#if defined(HARDWARE_BOARD_SUPPORTS_RF_BAND_868)
#include "efr32xg28/sl_rail_util_pa_curves_20dbm_868M.h"
#else
#include "efr32xg28/sl_rail_util_pa_curves_20dbm_915M.h"
#endif
#else
#if defined(HARDWARE_BOARD_SUPPORTS_RF_BAND_868)
#include "efr32xg28/sl_rail_util_pa_curves_14dbm_868M.h"
#else
#include "efr32xg28/sl_rail_util_pa_curves_14dbm_915M.h"
#endif
#endif
#else
#error "No valid PA available for selected chip."
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 4)
#if defined(_SILICON_LABS_EFR32_2G4HZ_HP_PA_PRESENT) \
&& (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM > 10)
#include "efr32xg24/sl_rail_util_pa_curves_20dbm.h"
#else
#include "efr32xg24/sl_rail_util_pa_curves_10dbm.h"
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 5)
#include "efr32xg25/sl_rail_util_pa_dbm_powersetting_mapping_table.h"
#include "efr32xg25/sl_rail_util_pa_curves.h"
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 6)
#if defined(_SILICON_LABS_EFR32_2G4HZ_HP_PA_PRESENT) \
&& (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM > 10)
#include "efr32xg26/sl_rail_util_pa_curves_20dbm.h"
#else
#if defined(EFR32MG26B510F3200IL136)
#include "efr32xg26/sl_rail_util_pa_curves_BGA.h"
#else
#include "efr32xg26/sl_rail_util_pa_curves_10dbm.h"
#endif
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 7)
// EFR32XG27 boards come in two different packaging -- CSP and QFN
// These packages have different matching circuits which leads
// to different PA curves.
// CSP packages have _SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM
// = 4 whereas for QFN package it is 6 or 8dBm, so this parameter
// is used to differentiate it.
#if (_SILICON_LABS_EFR32_2G4HZ_HP_PA_MAX_OUTPUT_DBM < 6)
#include "efr32xg27/sl_rail_util_pa_curves_CSP.h"
#else
#include "efr32xg27/sl_rail_util_pa_curves_QFN.h"
#endif
#elif (_SILICON_LABS_32B_SERIES_2_CONFIG == 9)
#include "efr32xg29/sl_rail_util_pa_curves.h"
#elif defined(_SILICON_LABS_32B_SERIES_3)
#include "sixg301/sl_rail_util_pa_dbm_powersetting_mapping_table.h"
#include "sixg301/sl_rail_util_pa_curves.h"
#else
#ifdef RAIL_INTERNAL_BUILD
#include "pa_curves_efr32_internal.h"
#else
#error "Unsupported platform!"
#endif
#endif
#ifdef __cplusplus
}
#endif
#endif // PA_CURVES_EFR32_H

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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_38M4Hz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_38M4HZ_H__
#define __SL_RAIL_BLE_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_38M4Hz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_38M4Hz_0_37_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_38M4HZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_38M4HZ_PHY_BLUETOOTH_2M_38M4HZ_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_38M4HZ_PHY_BLUETOOTH_2M_38M4HZ_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_38M4HZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_38M4HZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_38M4Hz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_38M4HZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_38M4HZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_38M4Hz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_38M4HZ_H__

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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_39MHz.c Normal file
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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_39MHz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_39MHZ_H__
#define __SL_RAIL_BLE_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_39MHz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_39MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_39MHz_0_37_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_39MHZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_39MHZ_PHY_BLUETOOTH_2M_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_39MHZ_PHY_BLUETOOTH_2M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_39MHZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_39MHZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_39MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_39MHZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_39MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_39MHz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_39MHZ_H__

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Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ble_config_40MHz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_BLE_CONFIG_40MHZ_H__
#define __SL_RAIL_BLE_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_aox_40MHz_0_34_modemConfig[];
extern const uint32_t sl_rail_ble_phy_125kbps_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_500kbps_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_simulscan_40MHz_0_37_modemConfig[];
extern const uint32_t sl_rail_ble_phy_1Mbps_viterbi_cs_0_78_40MHz_modemConfig[];
extern const uint32_t sl_rail_ble_phy_2Mbps_viterbi_cs_0_78_40MHz_modemConfig[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_40MHZ_PHY_BLUETOOTH_1M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_40MHZ_PHY_BLUETOOTH_2M_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_40MHZ_PHY_BLUETOOTH_2M_AOX_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_AOX_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_aox_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_aox_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_40MHZ_PHY_BLUETOOTH_LR_125K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_125KBPS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_125kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_125kbps_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_40MHZ_PHY_BLUETOOTH_LR_500K_PROD
#define RAIL0_SL_RAIL_BLE_PHY_500KBPS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_500kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_500kbps_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_CS_40MHZ_PHY_BLUETOOTH_1M_HADM_PROD
#define RAIL0_SL_RAIL_BLE_PHY_1MBPS_VITERBI_CS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_CS_40MHZ_PHY_BLUETOOTH_2M_HADM_PROD
#define RAIL0_SL_RAIL_BLE_PHY_2MBPS_VITERBI_CS_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channels[];
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_40MHZ_PHY_BLUETOOTH_1M_CONCURRENT_PROD
#define RAIL0_SL_RAIL_BLE_PHY_SIMULSCAN_40MHZ_PROFILE_BLE
extern const RAIL_ChannelConfig_t sl_rail_ble_phy_simulscan_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ble_phy_simulscan_40MHz_channels[];
#endif // __SL_RAIL_BLE_CONFIG_40MHZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_38M4Hz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_38M4Hz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0xf0, 0x49, 0x02, 6, 20, 0, 0, 0x00, 0xe0, 0x93, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x68, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
60000000UL,
2000000UL,
0x00F62004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
60000000UL,
2000000UL,
0x00F82004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00444444UL, // 68.26666666666665
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
60000000UL,
2000000UL,
0x00F82004UL,
0x02104911UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000035UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60D000EUL,
/* C05C */ 0x0000002AUL,
/* C060 */ 0x0D0C0B08UL,
/* C064 */ 0x0000000DUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00FF0264UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000008UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8A81B000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x0051BFBBUL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104911UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00FF0264UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000008UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8A81B000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x0051BFBBUL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104911UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x00000740UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x00000740UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_38M4Hz.h Normal file
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@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_38M4HZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_38M4HZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_38M4HZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_38M4HZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_38M4HZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_38M4HZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_38M4HZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_39MHz.c Normal file
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@@ -0,0 +1,880 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_39MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0xc0, 0x17, 0x53, 0x02, 6, 20, 0, 0, 0x80, 0x2f, 0xa6, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x8a, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
40000000UL,
2000000UL,
0x00F62004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x025047F1UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60D000EUL,
/* C05C */ 0x0000002AUL,
/* C060 */ 0x0D0C0B08UL,
/* C064 */ 0x0000000DUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00F00249UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8BC29000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x005254F8UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x001047F1UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00F00249UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8BC29000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x005254F8UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x001047F1UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_39MHz.h Normal file
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@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_39MHZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_39MHZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_39MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_39MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_39MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_39MHZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_39MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_39MHZ_H__

880
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_40MHz.c Normal file
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@@ -0,0 +1,880 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_ieee802154_config_40MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 1, 6, 0, 16, 39, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0
};
static const int32_t timingConfig_0[] = {
6125, 6125, 500, 0
};
static const int32_t timingConfig_1[] = {
6625, 6625, 500, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0x5a, 0x62, 0x02, 6, 20, 0, 0, 0x00, 0xb4, 0xc4, 0x04, 7, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0xc2, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0xc4, 0x09, 0, 0, 0, 0, 0x2c, 0x0b, 1, 4, 4, 4, 0xc4, 0x09, 0, 0, 0, 0, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x05, 0x03 };
static const uint8_t stackInfo_1[2] = { 0x05, 0x00 };
static const uint8_t stackInfo_2[2] = { 0x05, 0x04 };
static const uint8_t stackInfo_3[2] = { 0x05, 0x06 };
static const uint8_t stackInfo_4[2] = { 0x05, 0x05 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo_0[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_0,
0x00000000UL,
0UL,
40000000UL,
2000000UL,
0x00F62004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_1[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000A00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
static const uint32_t phyInfo_2[] = {
18UL,
0x00666666UL, // 102.39999999999999
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig_1,
0x00000B00UL,
0UL,
40000000UL,
2000000UL,
0x00F82004UL,
0x02504624UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
1999970UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x0007C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
0x0005C054UL, 0x00303151UL,
/* C058 */ 0xE60E000FUL,
/* C05C */ 0x0000002DUL,
/* C060 */ 0x0E0D0B08UL,
/* C064 */ 0x0000000EUL,
0x0009C070UL, 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0001C0CCUL, 0x00000001UL,
0x0002C0D4UL, 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01034040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
0x01024058UL, 0x00000000UL,
/* 405C */ 0x03000000UL,
0x01064068UL, 0x00FE027BUL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
0x01024084UL, 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
0x01104094UL, 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x0101411CUL, 0x8BC29000UL,
0x01054124UL, 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
0x0106413CUL, 0x005254F3UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01014158UL, 0x00000000UL,
0x01024164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
0x010141A4UL, 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
0x0104433CUL, 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
0x01024350UL, 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104624UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000050UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00148001UL,
/* 4010 */ 0x0000407FUL,
0x00024020UL, 0x00000000UL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x030007A0UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x00004000UL,
/* 410C */ 0x00004CFFUL,
/* 4110 */ 0x00004100UL,
/* 4114 */ 0x00004DFFUL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00303151UL,
/* C058 */ 0xE6070007UL,
/* C05C */ 0x00000015UL,
/* C060 */ 0x07060604UL,
/* C064 */ 0x00000007UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000500UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x000000A1UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000704UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x00008408UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x0002B820UL,
/* 4068 */ 0x00FE027BUL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x00000002UL,
/* 4074 */ 0x000807B0UL,
/* 4078 */ 0x000000A7UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08A0025AUL,
/* 4084 */ 0x744AC39BUL,
/* 4088 */ 0x000F03F0UL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x30100101UL,
/* 4098 */ 0x7F7F7050UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E73UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8BC29000UL,
/* 4120 */ 0x00000111UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x005254F3UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00001003UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x000000D0UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x365E63DEUL,
/* 41E8 */ 0x00076FBFUL,
/* 41EC */ 0x0016EA6FUL,
/* 41F0 */ 0x00CE30E5UL,
/* 41F4 */ 0x0ED9B9B2UL,
/* 41F8 */ 0x0494844BUL,
/* 41FC */ 0x24A91F5AUL,
/* 4200 */ 0x365E63DEUL,
/* 4204 */ 0x00076FBFUL,
/* 4208 */ 0x0016EA6FUL,
/* 420C */ 0x00CE30E5UL,
/* 4210 */ 0x0ED9B9B2UL,
/* 4214 */ 0x0494844BUL,
/* 4218 */ 0x24A91F5AUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x0000002CUL,
/* 4228 */ 0x3675EE07UL,
/* 422C */ 0x00001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x010A4330UL, 0x02400040UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2D0F285DUL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00104624UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x000240EBUL,
/* 80A0 */ 0x0000C0D5UL,
/* 80A4 */ 0x0000C0D5UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x008D2205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x008D2205UL,
0x010280B0UL, 0x0100003FUL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x1151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1FF169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0x1FE00410UL,
0x12010180UL, 0x00000779UL,
0x02020184UL, 0x00000000UL,
/* 0188 */ 0x00000048UL,
0x03014FFCUL, (uint32_t) &phyInfo_1,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x28211A14UL,
/* 4174 */ 0x423B342EUL,
/* 4178 */ 0x55435049UL,
/* 417C */ 0x0CBA9876UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x64282117UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x04AC0140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_2,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x012801FEUL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001400UL,
0x0001C044UL, 0x00000000UL,
0x0002C068UL, 0x0002C688UL,
/* C06C */ 0x00000500UL,
0x0001C0D0UL, 0x000000A1UL,
0x0103404CUL, 0x0413FB20UL,
/* 4050 */ 0x0042C007UL,
/* 4054 */ 0x00000000UL,
0x01024060UL, 0x28000000UL,
/* 4064 */ 0x00028000UL,
0x01014080UL, 0x08A0015AUL,
0x0102408CUL, 0x60000000UL,
/* 4090 */ 0x00000000UL,
0x01014120UL, 0x00000000UL,
0x01014138UL, 0xF00A20BCUL,
0x0101415CUL, 0x00001003UL,
0x010B416CUL, 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010141A8UL, 0x00000000UL,
0x0101423CUL, 0x00000112UL,
0x01024280UL, 0x40090001UL,
/* 4284 */ 0x00100801UL,
0x010342A0UL, 0x03E80000UL,
/* 42A4 */ 0x00000200UL,
/* 42A8 */ 0x00100000UL,
0x010142B4UL, 0x00C00000UL,
0x01034330UL, 0x02400041UL,
/* 4334 */ 0x05B40140UL,
/* 4338 */ 0x0100B050UL,
0x0101434CUL, 0x2D0F285DUL,
0xFFFFFFFFUL,
};
const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig[] = {
0x03014FFCUL, (uint32_t) &phyInfo_0,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280214UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00004300UL,
0x0001C044UL, 0x0000022EUL,
0x0002C068UL, 0x0002B6D1UL,
/* C06C */ 0x000006C0UL,
0x0001C0D0UL, 0x00000000UL,
0x0103404CUL, 0x0413F920UL,
/* 4050 */ 0x00620007UL,
/* 4054 */ 0x00007038UL,
0x01024060UL, 0x0F016800UL,
/* 4064 */ 0x4024B840UL,
0x01014080UL, 0x00006323UL,
0x0102408CUL, 0x60008000UL,
/* 4090 */ 0x00000ABEUL,
0x01014120UL, 0x00000B59UL,
0x01014138UL, 0xF00A2090UL,
0x0101415CUL, 0x00001E00UL,
0x010B416CUL, 0xC00C1400UL,
/* 4170 */ 0x2E27201AUL,
/* 4174 */ 0x48413A34UL,
/* 4178 */ 0x6654564FUL,
/* 417C */ 0x0DCBA987UL,
/* 4180 */ 0x00007323UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x6A2E2717UL,
/* 418C */ 0x001A1714UL,
/* 4190 */ 0x7DC80420UL,
/* 4194 */ 0x093A20A1UL,
0x010141A8UL, 0x00000029UL,
0x0101423CUL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x010342A0UL, 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x01034330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
0x0101434CUL, 0x2F87C145UL,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_1,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_2,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_3,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels[] = {
{
.phyConfigDeltaAdd = sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig,
.baseFrequency = 2405000000,
.channelSpacing = 5000000,
.physicalChannelOffset = 11,
.channelNumberStart = 11,
.channelNumberEnd = 26,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_4,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};
const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig = {
.phyConfigBase = sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};

74
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_ieee802154_config_40MHz.h Normal file
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@@ -0,0 +1,74 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__
#define __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_modemConfigBase[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_modemConfig[];
extern const uint32_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_modemConfig[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_40MHZ_PHY_IEEE802154_2P4GHZ_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_40MHZ_PHY_IEEE802154_2P4GHZ_ANTDIV_FASTSWITCH
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FAST_SWITCH_40MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_40MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_40MHZ_PHY_IEEE802154_2P4GHZ_DIVERSITY_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_ANTDIV_FEM_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channels[];
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_40MHZ_PHY_IEEE802154_2P4GHZ_FEM_PROD
#define RAIL0_SL_RAIL_IEEE802154_PHY_2G4HZ_FEM_40MHZ_PROFILE_IEEE802154OQPSK
extern const RAIL_ChannelConfig_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channels[];
#endif // __SL_RAIL_IEEE802154_CONFIG_40MHZ_H__

344
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_38M4Hz.c Normal file
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@@ -0,0 +1,344 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_38M4Hz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0xf0, 0x49, 0x02, 6, 20, 0, 0, 0x00, 0xe0, 0x93, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x68, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100444UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6DF00F0UL,
/* C05C */ 0x00005355UL,
/* C060 */ 0xD8CCB484UL,
/* C064 */ 0x000000DFUL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067080UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031DUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503358UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x0006AAAAUL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100444UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_38M4Hz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_38M4Hz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_38M4Hz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 38400000UL,
};

48
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_38M4Hz.h Normal file
View File

@@ -0,0 +1,48 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_38M4Hz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_38M4HZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_38M4HZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_38M4Hz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_38M4Hz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_38M4HZ_H__

344
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_39MHz.c Normal file
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@@ -0,0 +1,344 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_39MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0xc0, 0x17, 0x53, 0x02, 6, 20, 0, 0, 0x80, 0x2f, 0xa6, 0x04, 5, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0x8a, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0x2c, 0x0b, 1, 4, 4, 4, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100433UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_39MHz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6E300F4UL,
/* C05C */ 0x000054A3UL,
/* C060 */ 0xDCCFB786UL,
/* C064 */ 0x000000E3UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067242UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031CUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503356UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00069069UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100433UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_39MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_39MHz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_39MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_39MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 39000000UL,
};

48
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_39MHz.h Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_39MHz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_39MHZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_39MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_39MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_39MHz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_39MHZ_H__

344
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_40MHz.c Normal file
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/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_rail_rfsense_ook_config_40MHz.h"
static const uint8_t irCalConfig[] = {
25, 63, 1, 6, 4, 16, 1, 0, 0, 1, 0, 2, 2, 0, 0, 0, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0
};
static const int32_t timingConfig[] = {
1103579, 1103579, 500000, 0
};
static const uint8_t hfxoRetimingConfigEntries[] = {
2, 0, 0, 0, 0x00, 0x5a, 0x62, 0x02, 6, 20, 0, 0, 0x00, 0xb4, 0xc4, 0x04, 7, 56, 0, 0, 0xa0, 0x08, 0, 0, 0, 0, 0x58, 0x09, 1, 4, 7, 6, 0x10, 0x0a, 1, 4, 7, 7, 0xc8, 0x0a, 0, 4, 8, 7, 0x80, 0x0b, 0, 4, 8, 8, 0x38, 0x0c, 0, 4, 9, 8, 0x61, 0x08, 0, 0, 0, 0, 0xc2, 0x08, 0, 0, 0, 0, 0xc7, 0x09, 1, 4, 4, 3, 0xc4, 0x09, 0, 0, 0, 0, 0x2c, 0x0b, 1, 4, 4, 4, 0xc4, 0x09, 0, 0, 0, 0, 0x92, 0x0c, 1, 4, 5, 4
};
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
static const uint8_t stackInfo_0[2] = { 0x00, 0x00 };
#endif // RADIO_CONFIG_ENABLE_STACK_INFO
static RAIL_ChannelConfigEntryAttr_t channelConfigEntryAttr = {
#if RAIL_SUPPORTS_OFDM_PA
{
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL }
}
#else // RAIL_SUPPORTS_OFDM_PA
#ifdef RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
{ 0xFFFFFFFFUL, 0xFFFFFFFFUL, },
#else
{ 0xFFFFFFFFUL },
#endif // RADIO_CONFIG_ENABLE_IRCAL_MULTIPLE_RF_PATHS
#endif // RAIL_SUPPORTS_OFDM_PA
};
static const uint32_t phyInfo[] = {
18UL,
0x00000000UL, // 0.0
(uint32_t) NULL,
(uint32_t) irCalConfig,
(uint32_t) timingConfig,
0x00000000UL,
0UL,
22950000UL,
1000UL,
0x00F20201UL,
0x03100418UL,
(uint32_t) NULL,
(uint32_t) hfxoRetimingConfigEntries,
(uint32_t) NULL,
0UL,
0UL,
2000UL,
(uint32_t) NULL,
(uint32_t) NULL,
(uint32_t) NULL,
};
const uint32_t sl_rfsense_ook_1kbps_40MHz_modemConfigBase[] = {
0x0002400CUL, 0x00000000UL,
/* 4010 */ 0x00004000UL,
0x00024020UL, 0x0000000FUL,
/* 4024 */ 0x00000000UL,
0x00074030UL, 0x00000000UL,
/* 4034 */ 0x00000000UL,
/* 4038 */ 0x00000000UL,
/* 403C */ 0x00000000UL,
/* 4040 */ 0x00000000UL,
/* 4044 */ 0x00004000UL,
/* 4048 */ 0x03000700UL,
0x00014050UL, 0x00000000UL,
0x0002405CUL, 0x00000000UL,
/* 4060 */ 0x00000000UL,
0x000140A8UL, 0x00000007UL,
0x000440BCUL, 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
0x00044108UL, 0x000040FFUL,
/* 410C */ 0x00000000UL,
/* 4110 */ 0x000041FFUL,
/* 4114 */ 0x00000000UL,
0x1001C020UL, 0x0007F800UL,
0x3001C020UL, 0x01280100UL,
0x1001C024UL, 0x000000FFUL,
0x3001C024UL, 0x00001300UL,
0x0008C028UL, 0x03B380ECUL,
/* C02C */ 0x51407543UL,
/* C030 */ 0xF8000FA0UL,
/* C034 */ 0x00004000UL,
/* C038 */ 0x0007AAA8UL,
/* C03C */ 0x00000000UL,
/* C040 */ 0x00000000UL,
/* C044 */ 0x00000000UL,
0x0010C054UL, 0x00302151UL,
/* C058 */ 0xE6E900FAUL,
/* C05C */ 0x000056CEUL,
/* C060 */ 0xE1D5BC8AUL,
/* C064 */ 0x000000E9UL,
/* C068 */ 0x0002C688UL,
/* C06C */ 0x00000740UL,
/* C070 */ 0x000010BAUL,
/* C074 */ 0x00200400UL,
/* C078 */ 0x00801804UL,
/* C07C */ 0x01203C0BUL,
/* C080 */ 0x02107C18UL,
/* C084 */ 0x06E0FC2FUL,
/* C088 */ 0x0000007FUL,
/* C08C */ 0x00000000UL,
/* C090 */ 0x00000000UL,
0x0005C0A8UL, 0x15724BBDUL,
/* C0AC */ 0x0518A311UL,
/* C0B0 */ 0x76543210UL,
/* C0B4 */ 0x00000A98UL,
/* C0B8 */ 0x00000000UL,
0x0004C0CCUL, 0x00000001UL,
/* C0D0 */ 0x00000000UL,
/* C0D4 */ 0x000A0001UL,
/* C0D8 */ 0x00280001UL,
0x01010008UL, 0x00000744UL,
0x01010018UL, 0x00000000UL,
0x01010020UL, 0x0000A001UL,
0x01254040UL, 0x00000000UL,
/* 4044 */ 0x00000000UL,
/* 4048 */ 0x00000010UL,
/* 404C */ 0x00000191UL,
/* 4050 */ 0x0602C001UL,
/* 4054 */ 0x00003000UL,
/* 4058 */ 0x00000000UL,
/* 405C */ 0x03000000UL,
/* 4060 */ 0x20000000UL,
/* 4064 */ 0x00000000UL,
/* 4068 */ 0x00067530UL,
/* 406C */ 0x00000841UL,
/* 4070 */ 0x000407F0UL,
/* 4074 */ 0x00000010UL,
/* 4078 */ 0x00000000UL,
/* 407C */ 0x00000000UL,
/* 4080 */ 0x08AC0000UL,
/* 4084 */ 0x00000000UL,
/* 4088 */ 0x000F031CUL,
/* 408C */ 0x60000000UL,
/* 4090 */ 0x00000000UL,
/* 4094 */ 0x00000000UL,
/* 4098 */ 0x00000000UL,
/* 409C */ 0x00000000UL,
/* 40A0 */ 0x00000000UL,
/* 40A4 */ 0x00000000UL,
/* 40A8 */ 0x00000000UL,
/* 40AC */ 0x00000000UL,
/* 40B0 */ 0x00000000UL,
/* 40B4 */ 0x00000000UL,
/* 40B8 */ 0x00000000UL,
/* 40BC */ 0x00000000UL,
/* 40C0 */ 0x00000000UL,
/* 40C4 */ 0x00000000UL,
/* 40C8 */ 0x00000000UL,
/* 40CC */ 0x00000000UL,
/* 40D0 */ 0x00000000UL,
0x010140E0UL, 0x00000200UL,
0x01024110UL, 0x00051E33UL,
/* 4114 */ 0x00000000UL,
0x010E411CUL, 0x8B561000UL,
/* 4120 */ 0x00000000UL,
/* 4124 */ 0x078304FFUL,
/* 4128 */ 0x3AC81388UL,
/* 412C */ 0x0C6606FFUL,
/* 4130 */ 0x078304FFUL,
/* 4134 */ 0x03FF1388UL,
/* 4138 */ 0xF00A20BCUL,
/* 413C */ 0x00503354UL,
/* 4140 */ 0x00000000UL,
/* 4144 */ 0x123556B7UL,
/* 4148 */ 0x50000000UL,
/* 414C */ 0x00003B80UL,
/* 4150 */ 0x00000000UL,
0x01024158UL, 0x00000000UL,
/* 415C */ 0x00000000UL,
0x010D4164UL, 0x0000010CUL,
/* 4168 */ 0x00FA53E8UL,
/* 416C */ 0x40000000UL,
/* 4170 */ 0x00000000UL,
/* 4174 */ 0x00000000UL,
/* 4178 */ 0x00000000UL,
/* 417C */ 0x00000000UL,
/* 4180 */ 0x00000000UL,
/* 4184 */ 0x00000101UL,
/* 4188 */ 0x00000000UL,
/* 418C */ 0x00000000UL,
/* 4190 */ 0x00000000UL,
/* 4194 */ 0x00000000UL,
0x010241A4UL, 0x00000000UL,
/* 41A8 */ 0x00000000UL,
0x010241B0UL, 0x00000000UL,
/* 41B4 */ 0x00200000UL,
0x010341BCUL, 0x00000000UL,
/* 41C0 */ 0x003C0000UL,
/* 41C4 */ 0x00066666UL,
0x010341D0UL, 0x00000000UL,
/* 41D4 */ 0x00000010UL,
/* 41D8 */ 0x00020000UL,
0x011641E0UL, 0x00000000UL,
/* 41E4 */ 0x0BFFE7E6UL,
/* 41E8 */ 0x000AA1CDUL,
/* 41EC */ 0x006A06BDUL,
/* 41F0 */ 0x004DB05EUL,
/* 41F4 */ 0x0E42027DUL,
/* 41F8 */ 0x0222B6A5UL,
/* 41FC */ 0x34B225FFUL,
/* 4200 */ 0x0BFFE7E6UL,
/* 4204 */ 0x000AA1CDUL,
/* 4208 */ 0x006A06BDUL,
/* 420C */ 0x004DB05EUL,
/* 4210 */ 0x0E42027DUL,
/* 4214 */ 0x0222B6A5UL,
/* 4218 */ 0x34B225FFUL,
/* 421C */ 0x00000000UL,
/* 4220 */ 0x00000000UL,
/* 4224 */ 0x00000005UL,
/* 4228 */ 0x00000000UL,
/* 422C */ 0x40001860UL,
/* 4230 */ 0x00000000UL,
/* 4234 */ 0x00000000UL,
0x0101423CUL, 0x00000000UL,
0x01034244UL, 0x00000014UL,
/* 4248 */ 0x00000000UL,
/* 424C */ 0x04000008UL,
0x01014268UL, 0x00000000UL,
0x01024280UL, 0x00000000UL,
/* 4284 */ 0x00000081UL,
0x01054298UL, 0x0200003FUL,
/* 429C */ 0x0000FFFFUL,
/* 42A0 */ 0x0000FFFFUL,
/* 42A4 */ 0x000003FFUL,
/* 42A8 */ 0x0000FFFFUL,
0x010142B4UL, 0x00000000UL,
0x010A4330UL, 0x01200040UL,
/* 4334 */ 0x000000A0UL,
/* 4338 */ 0x01005008UL,
/* 433C */ 0x1F1F1F1FUL,
/* 4340 */ 0x1B1F1F1FUL,
/* 4344 */ 0x11131518UL,
/* 4348 */ 0x0C0D0E10UL,
/* 434C */ 0x2F87C145UL,
/* 4350 */ 0x00000000UL,
/* 4354 */ 0x00000000UL,
0x01018010UL, 0x00000003UL,
0x01028038UL, 0x00100418UL,
/* 803C */ 0x00000001UL,
0x0103809CUL, 0x00000000UL,
/* 80A0 */ 0x00037870UL,
/* 80A4 */ 0x000000D0UL,
0x110180A8UL, 0x000001F0UL,
0x310180A8UL, 0x01CB4205UL,
0x110180ACUL, 0x000001F0UL,
0x310180ACUL, 0x00FD3E05UL,
0x010280B0UL, 0x02000300UL,
/* 80B4 */ 0x01000037UL,
0x0201009CUL, 0x04000C00UL,
0x020300D8UL, 0xAA400005UL,
/* 00DC */ 0x00000188UL,
/* 00E0 */ 0x000000C0UL,
0x120100ECUL, 0x00000FE0UL,
0x320100ECUL, 0x5151200CUL,
0x020100F0UL, 0x0000012BUL,
0x12010110UL, 0x000FFF00UL,
0x32010110UL, 0x31000002UL,
0x12010150UL, 0x0001C000UL,
0x32010150UL, 0x00A200C1UL,
0x02010174UL, 0x0C1B8169UL,
0x12010178UL, 0x001C0000UL,
0x32010178UL, 0xCFE00410UL,
0x12010180UL, 0x00000779UL,
0x32010180UL, 0x00000002UL,
0x02020184UL, 0x00001000UL,
/* 0188 */ 0x00000050UL,
0x03014FFCUL, (uint32_t) &phyInfo,
0xFFFFFFFFUL,
};
const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_40MHz_channels[] = {
{
.phyConfigDeltaAdd = NULL,
.baseFrequency = 2450000000,
.channelSpacing = 1000000,
.physicalChannelOffset = 0,
.channelNumberStart = 0,
.channelNumberEnd = 0,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &channelConfigEntryAttr,
#ifdef RADIO_CONFIG_ENABLE_CONC_PHY
.entryType = 0,
#endif
#ifdef RADIO_CONFIG_ENABLE_STACK_INFO
.stackInfo = stackInfo_0,
#endif
.alternatePhy = NULL,
},
};
const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_40MHz_channelConfig = {
.phyConfigBase = sl_rfsense_ook_1kbps_40MHz_modemConfigBase,
.phyConfigDeltaSubtract = NULL,
.configs = sl_rfsense_ook_1kbps_40MHz_channels,
.length = 1U,
.signature = 0UL,
.xtalFrequencyHz = 40000000UL,
};

48
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/efr32xg24/sl_rail_rfsense_ook_config_40MHz.h Normal file
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@@ -0,0 +1,48 @@
/***************************************************************************//**
* @brief RAIL Configuration
* @details
* WARNING: Auto-Generated Radio Config Header - DO NOT EDIT
* Radio Configurator Version: 2404.4.4
* RAIL Adapter Version: 2.4.33
* RAIL Compatibility: 2.x
*******************************************************************************
* # License
* <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__
#define __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__
#include <stdint.h>
#include "rail_types.h"
extern const uint32_t sl_rfsense_ook_1kbps_40MHz_modemConfigBase[];
#define RAIL0_SL_RFSENSE_OOK_1KBPS_40MHZ_PHY_RFSENSE_2450M_OOK_1KBPS
#define RAIL0_SL_RFSENSE_OOK_1KBPS_40MHZ_PROFILE_BASE
extern const RAIL_ChannelConfig_t sl_rfsense_ook_1kbps_40MHz_channelConfig;
extern const RAIL_ChannelConfigEntry_t sl_rfsense_ook_1kbps_40MHz_channels[];
#endif // __SL_RAIL_RFSENSE_OOK_CONFIG_40MHZ_H__

355
Libs/platform/radio/rail_lib/plugin/rail_util_built_in_phys/sl_rail_phy_overrides.c Normal file
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/***************************************************************************//**
* @file sl_rail_phy_overrides.c
* @brief Applies PHY overrides based on a device's HFXO frequency.
*******************************************************************************
* # License
* <b>Copyright 2024 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifdef SL_COMPONENT_CATALOG_PRESENT
#include "sl_component_catalog.h"
#endif // SL_COMPONENT_CATALOG_PRESENT
#if defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_clock_manager_oscillator_config.h"
#define SL_RAIL_PHY_INIT_HFXO_FREQ SL_CLOCK_MANAGER_HFXO_FREQ
#else // !defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_device_init_hfxo_config.h"
#define SL_RAIL_PHY_INIT_HFXO_FREQ SL_DEVICE_INIT_HFXO_FREQ
#endif // defined(SL_CATALOG_CLOCK_MANAGER_PRESENT)
#include "sl_rail_ble_config_38M4Hz.h"
#include "sl_rail_ieee802154_config_38M4Hz.h"
#include "sl_rail_rfsense_ook_config_38M4Hz.h"
#include "sl_rail_ble_config_39MHz.h"
#include "sl_rail_ieee802154_config_39MHz.h"
#include "sl_rail_rfsense_ook_config_39MHz.h"
#include "sl_rail_ble_config_40MHz.h"
#include "sl_rail_ieee802154_config_40MHz.h"
#include "sl_rail_rfsense_ook_config_40MHz.h"
#if SL_RAIL_PHY_INIT_HFXO_FREQ == 38400000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_38M4Hz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_38M4Hz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs = NULL;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs = NULL;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_38M4Hz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_38M4Hz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_38M4Hz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_38M4Hz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_38M4Hz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_38M4Hz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_38M4Hz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_38M4Hz_channelConfig;
#elif SL_RAIL_PHY_INIT_HFXO_FREQ == 39000000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_39MHz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_39MHz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs = NULL;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs = NULL;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_39MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_39MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_39MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_39MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_39MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_39MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_39MHz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_39MHz_channelConfig;
#elif SL_RAIL_PHY_INIT_HFXO_FREQ == 40000000
#if RAIL_BLE_SUPPORTS_1MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1Mbps =
&sl_rail_ble_phy_1Mbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_NON_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2Mbps =
&sl_rail_ble_phy_2Mbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_1MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbi =
&sl_rail_ble_phy_1Mbps_viterbi_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_2MBPS_VITERBI
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbi =
&sl_rail_ble_phy_2Mbps_viterbi_40MHz_channelConfig;
#if RAIL_BLE_SUPPORTS_AOX
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsAox =
&sl_rail_ble_phy_2Mbps_aox_40MHz_channelConfig;
#endif
#endif
#if RAIL_BLE_SUPPORTS_CS
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy1MbpsViterbiCs =
&sl_rail_ble_phy_1Mbps_viterbi_cs_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy2MbpsViterbiCs =
&sl_rail_ble_phy_2Mbps_viterbi_cs_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_CODED_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy125kbps =
&sl_rail_ble_phy_125kbps_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_BLE_Phy500kbps =
&sl_rail_ble_phy_500kbps_40MHz_channelConfig;
#endif
#if RAIL_BLE_SUPPORTS_SIMULSCAN_PHY
const RAIL_ChannelConfig_t *const RAIL_BLE_PhySimulscan =
&sl_rail_ble_phy_simulscan_40MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_2P4GHZ_BAND && RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz =
&sl_rail_ieee802154_phy_2G4Hz_40MHz_channelConfig;
#endif
#if RAIL_SUPPORTS_ANTENNA_DIVERSITY && RAIL_SUPPORTS_2P4GHZ_BAND \
&& RAIL_SUPPORTS_PROTOCOL_IEEE802154
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDiv =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_RX_CHANNEL_SWITCHING && (_SILICON_LABS_32B_SERIES_2_CONFIG != 1)
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzRxChSwitching =
&sl_rail_ieee802154_phy_2G4Hz_fast_switch_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoex =
&sl_rail_ieee802154_phy_2G4Hz_coex_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_COEX_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoex =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_2MBPS_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz1MbpsFec =
&sl_rail_ieee802154_phy_2G4Hz_1Mbps_fec_40MHz_channelConfig;
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHz2Mbps =
&sl_rail_ieee802154_phy_2G4Hz_2Mbps_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzFem =
&sl_rail_ieee802154_phy_2G4Hz_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_coex_fem_40MHz_channelConfig;
#endif
#if RAIL_IEEE802154_SUPPORTS_FEM_PHY && RAIL_IEEE802154_SUPPORTS_COEX_PHY \
&& RAIL_SUPPORTS_ANTENNA_DIVERSITY
const RAIL_ChannelConfig_t *const RAIL_IEEE802154_Phy2p4GHzAntDivCoexFem =
&sl_rail_ieee802154_phy_2G4Hz_antdiv_coex_fem_40MHz_channelConfig;
#endif
const RAIL_ChannelConfig_t *const RAIL_RFSENSE_OOK_Phy1kbps =
&sl_rfsense_ook_1kbps_40MHz_channelConfig;
#endif // SL_RAIL_PHY_INIT_HFXO_FREQ

39
Libs/platform/radio/rail_lib/plugin/rail_util_power_manager_init/sl_rail_util_power_manager_init.c Normal file
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/***************************************************************************//**
* @file
* @brief Initialize RAIL power manager
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "rail.h"
#include "sl_rail_util_power_manager_init.h"
#include "sl_rail_util_power_manager_init_config.h"
void sl_rail_util_power_manager_init(void)
{
#if SL_RAIL_UTIL_RAIL_POWER_MANAGER_INIT == 1
RAIL_InitPowerManager();
#endif
}

50
Libs/platform/radio/rail_lib/plugin/rail_util_power_manager_init/sl_rail_util_power_manager_init.h Normal file
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/***************************************************************************//**
* @file
* @brief Initialize RAIL power manager
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_POWER_MANAGER_INIT_H
#define SL_RAIL_UTIL_POWER_MANAGER_INIT_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize RAIL power manager
*
* @note: This function should be called during application initialization,
* after sl_power_manager_init function has been called.
*/
void sl_rail_util_power_manager_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_POWER_MANAGER_INIT_H

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Libs/platform/radio/rail_lib/plugin/rail_util_pti/sl_rail_util_pti.c Normal file
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/***************************************************************************//**
* @file
* @brief Packet Trace Information
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "em_device.h"
#include "sl_gpio.h"
#include "rail.h"
#include "sl_rail_util_pti.h"
#include "sl_rail_util_pti_config.h"
void sl_rail_util_pti_init(void)
{
RAIL_PtiConfig_t railPtiConfig = {
.mode = SL_RAIL_UTIL_PTI_MODE,
.baud = SL_RAIL_UTIL_PTI_BAUD_RATE_HZ,
#if defined(SL_RAIL_UTIL_PTI_DOUT_PORT) && defined(SL_RAIL_UTIL_PTI_DOUT_PIN)
.doutPort = (uint8_t)SL_RAIL_UTIL_PTI_DOUT_PORT,
.doutPin = SL_RAIL_UTIL_PTI_DOUT_PIN,
#ifdef SL_RAIL_UTIL_PTI_DOUT_LOC
.doutLoc = SL_RAIL_UTIL_PTI_DOUT_LOC,
#endif // SL_RAIL_UTIL_PTI_DOUT_LOC
#endif // dout support
#if defined(SL_RAIL_UTIL_PTI_DCLK_PORT) && defined(SL_RAIL_UTIL_PTI_DCLK_PIN)
.dclkPort = (uint8_t)SL_RAIL_UTIL_PTI_DCLK_PORT,
.dclkPin = SL_RAIL_UTIL_PTI_DCLK_PIN,
#ifdef SL_RAIL_UTIL_PTI_DCLK_LOC
.dclkLoc = SL_RAIL_UTIL_PTI_DCLK_LOC,
#endif // SL_RAIL_UTIL_PTI_DCLK_LOC
#endif // dclk support
#if defined(SL_RAIL_UTIL_PTI_DFRAME_PORT) && defined(SL_RAIL_UTIL_PTI_DFRAME_PIN)
.dframePort = (uint8_t)SL_RAIL_UTIL_PTI_DFRAME_PORT,
.dframePin = SL_RAIL_UTIL_PTI_DFRAME_PIN,
#ifdef SL_RAIL_UTIL_PTI_DFRAME_LOC
.dframeLoc = SL_RAIL_UTIL_PTI_DFRAME_LOC,
#endif // SL_RAIL_UTIL_PTI_DFRAME_LOC
#endif // dframe support
};
RAIL_ConfigPti(RAIL_EFR32_HANDLE, &railPtiConfig);
}

49
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/***************************************************************************//**
* @file
* @brief Packet Trace Information initialization and usage
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_PTI_H
#define SL_RAIL_UTIL_PTI_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize the RAIL PTI Utility.
*
* @note: This function should be called during application initialization.
*/
void sl_rail_util_pti_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_PTI_H

38
Libs/platform/radio/rail_lib/plugin/rail_util_rssi/sl_rail_util_rssi.c Normal file
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/***************************************************************************//**
* @file
* @brief Default RSSI setup
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "rail.h"
#include "sl_rail_util_rssi.h"
#include "sl_rail_util_rssi_config.h"
void sl_rail_util_rssi_init(void)
{
(void)RAIL_SetRssiOffset(RAIL_EFR32_HANDLE, (int8_t)SL_RAIL_UTIL_RSSI_OFFSET);
}

50
Libs/platform/radio/rail_lib/plugin/rail_util_rssi/sl_rail_util_rssi.h Normal file
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/***************************************************************************//**
* @file
* @brief Default RSSI setup
*******************************************************************************
* # License
* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#ifndef SL_RAIL_UTIL_RSSI_H
#define SL_RAIL_UTIL_RSSI_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* Initialize the default RSSI.
*
* @note: This function should be called during application initialization
* before \ref RAIL_Init has been called.
*/
void sl_rail_util_rssi_init(void);
#ifdef __cplusplus
}
#endif
#endif // SL_RAIL_UTIL_RSSI_H

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/***************************************************************************//**
* @file
* @brief
*******************************************************************************
* # License
* <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
*******************************************************************************
*
* SPDX-License-Identifier: Zlib
*
* The licensor of this software is Silicon Laboratories Inc.
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the authors be held liable for any damages
* arising from the use of this software.
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software
* in a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
*
******************************************************************************/
#include "sl_rail_util_sequencer_config.h"
#include "rail.h"
#if !SL_RAIL_UTIL_SEQUENCER_RUNTIME_IMAGE_SELECTION \
&& defined(SL_RAIL_UTIL_SEQUENCER_IMAGE)
RAIL_Status_t RAILCb_RadioSequencerImageLoad(void)
{
#if SL_RAIL_UTIL_SEQUENCER_IMAGE == RAIL_SEQ_IMAGE_1
return RAIL_LoadSequencerImage1(RAIL_EFR32_HANDLE);
#elif SL_RAIL_UTIL_SEQUENCER_IMAGE == RAIL_SEQ_IMAGE_2
return RAIL_LoadSequencerImage2(RAIL_EFR32_HANDLE);
#else
#error "Must choose a valid sequencer image!"
#endif
}
#endif