Initial commit of firmware
This commit is contained in:
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/**************************************************************************//**
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* @file
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* @brief Device Manager Peripheral Definition
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******************************************************************************
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* # License
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* <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#include "em_device.h"
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#include "sl_device_peripheral.h"
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#include "sl_device_clock.h"
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/***************************************************************************//**
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* @addtogroup device_peripheral Device Abstraction Peripheral
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* @{
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******************************************************************************/
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#if defined(ACMP0_BASE)
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// Define peripheral ACMP0.
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const sl_peripheral_val_t sl_peripheral_val_acmp0 = { .base = ACMP0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_ACMP0 };
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#endif
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#if defined(ACMP1_BASE)
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// Define peripheral ACMP1.
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const sl_peripheral_val_t sl_peripheral_val_acmp1 = { .base = ACMP1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_ACMP1 };
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#endif
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#if defined(BURAM_BASE)
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// Define peripheral BURAM.
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const sl_peripheral_val_t sl_peripheral_val_buram = { .base = BURAM_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_BURAM };
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#endif
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#if defined(BURTC_BASE)
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// Define peripheral BURTC.
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const sl_peripheral_val_t sl_peripheral_val_burtc = { .base = BURTC_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM4GRPACLK,
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.bus_clock = SL_BUS_CLOCK_BURTC };
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#endif
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#if defined(CMU_BASE)
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// Define peripheral CMU.
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const sl_peripheral_val_t sl_peripheral_val_cmu = { .base = CMU_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_INVALID };
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#endif
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#if defined(DCDC_BASE)
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// Define peripheral DCDC.
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const sl_peripheral_val_t sl_peripheral_val_dcdc = { .base = DCDC_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_DCDC };
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#endif
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#if defined(DMEM_BASE)
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// Define peripheral DMEM.
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const sl_peripheral_val_t sl_peripheral_val_dmem = { .base = DMEM_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_DMEM };
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#endif
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#if defined(DPLL0_BASE)
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// Define peripheral DPLL0.
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const sl_peripheral_val_t sl_peripheral_val_dpll0 = { .base = DPLL0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_DPLLREFCLK,
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.bus_clock = SL_BUS_CLOCK_DPLL0 };
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#endif
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#if defined(EMU_BASE)
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// Define peripheral EMU.
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const sl_peripheral_val_t sl_peripheral_val_emu = { .base = EMU_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_INVALID };
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#endif
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#if defined(EUSART0_BASE)
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// Define peripheral EUSART0.
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const sl_peripheral_val_t sl_peripheral_val_eusart0 = { .base = EUSART0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EUSART0CLK,
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.bus_clock = SL_BUS_CLOCK_EUSART0 };
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#endif
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#if defined(EUSART1_BASE)
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// Define peripheral EUSART1.
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const sl_peripheral_val_t sl_peripheral_val_eusart1 = { .base = EUSART1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPCCLK,
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.bus_clock = SL_BUS_CLOCK_EUSART1 };
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#endif
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#if defined(FSRCO_BASE)
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// Define peripheral FSRCO.
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const sl_peripheral_val_t sl_peripheral_val_fsrco = { .base = FSRCO_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_FSRCO };
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#endif
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#if defined(GPCRC_BASE)
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// Define peripheral GPCRC0.
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const sl_peripheral_val_t sl_peripheral_val_gpcrc0 = { .base = GPCRC_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_GPCRC0 };
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#endif
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#if defined(GPIO_BASE)
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// Define peripheral GPIO.
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const sl_peripheral_val_t sl_peripheral_val_gpio = { .base = GPIO_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_GPIO };
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#endif
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#if defined(HFRCO0_BASE)
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// Define peripheral HFRCO0.
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const sl_peripheral_val_t sl_peripheral_val_hfrco0 = { .base = HFRCO0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_HFRCO0 };
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#endif
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#if defined(HFRCOEM23_BASE)
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// Define peripheral HFRCOEM23.
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const sl_peripheral_val_t sl_peripheral_val_hfrcoem23 = { .base = HFRCOEM23_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_HFRCOEM23 };
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#endif
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#if defined(HFXO0_BASE)
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// Define peripheral HFXO0.
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const sl_peripheral_val_t sl_peripheral_val_hfxo0 = { .base = HFXO0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_HFXO0 };
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#endif
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#if defined(HOSTMAILBOX_BASE)
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// Define peripheral HOSTMAILBOX.
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const sl_peripheral_val_t sl_peripheral_val_hostmailbox = { .base = HOSTMAILBOX_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_HOSTMAILBOX };
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#endif
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#if defined(I2C0_BASE)
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// Define peripheral I2C0.
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const sl_peripheral_val_t sl_peripheral_val_i2c0 = { .base = I2C0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_LSPCLK,
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.bus_clock = SL_BUS_CLOCK_I2C0 };
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#endif
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#if defined(I2C1_BASE)
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// Define peripheral I2C1.
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const sl_peripheral_val_t sl_peripheral_val_i2c1 = { .base = I2C1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_I2C1 };
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#endif
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#if defined(IADC0_BASE)
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// Define peripheral IADC0.
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const sl_peripheral_val_t sl_peripheral_val_iadc0 = { .base = IADC0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_IADCCLK,
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.bus_clock = SL_BUS_CLOCK_IADC0 };
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#endif
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#if defined(ICACHE0_BASE)
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// Define peripheral ICACHE0.
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const sl_peripheral_val_t sl_peripheral_val_icache0 = { .base = ICACHE0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_ICACHE0 };
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#endif
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#if defined(KEYSCAN_BASE)
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// Define peripheral KEYSCAN.
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const sl_peripheral_val_t sl_peripheral_val_keyscan = { .base = KEYSCAN_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_KEYSCAN };
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#endif
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#if defined(LDMA_BASE)
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// Define peripheral LDMA0.
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const sl_peripheral_val_t sl_peripheral_val_ldma0 = { .base = LDMA_BASE,
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.clk_branch = SL_CLOCK_BRANCH_HCLK,
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.bus_clock = SL_BUS_CLOCK_LDMA0 };
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#endif
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#if defined(LDMAXBAR_BASE)
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// Define peripheral LDMAXBAR0.
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const sl_peripheral_val_t sl_peripheral_val_ldmaxbar0 = { .base = LDMAXBAR_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_LDMAXBAR0 };
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#endif
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#if defined(LETIMER0_BASE)
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// Define peripheral LETIMER0.
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const sl_peripheral_val_t sl_peripheral_val_letimer0 = { .base = LETIMER0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM23GRPACLK,
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.bus_clock = SL_BUS_CLOCK_LETIMER0 };
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#endif
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#if defined(LFRCO_BASE)
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// Define peripheral LFRCO.
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const sl_peripheral_val_t sl_peripheral_val_lfrco = { .base = LFRCO_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_LFRCO };
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#endif
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#if defined(LFXO_BASE)
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// Define peripheral LFXO.
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const sl_peripheral_val_t sl_peripheral_val_lfxo = { .base = LFXO_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_LFXO };
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#endif
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#if defined(MSC_BASE)
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// Define peripheral MSC.
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const sl_peripheral_val_t sl_peripheral_val_msc = { .base = MSC_BASE,
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.clk_branch = SL_CLOCK_BRANCH_HCLK,
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.bus_clock = SL_BUS_CLOCK_MSC };
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#endif
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#if defined(MVP_BASE)
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// Define peripheral MVP.
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const sl_peripheral_val_t sl_peripheral_val_mvp = { .base = MVP_BASE,
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.clk_branch = SL_CLOCK_BRANCH_HCLK,
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.bus_clock = SL_BUS_CLOCK_MVP };
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#endif
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#if defined(PCNT0_BASE)
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// Define peripheral PCNT0.
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const sl_peripheral_val_t sl_peripheral_val_pcnt0 = { .base = PCNT0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCNT0CLK,
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.bus_clock = SL_BUS_CLOCK_PCNT0 };
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#endif
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#if defined(PRS_BASE)
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// Define peripheral PRS.
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const sl_peripheral_val_t sl_peripheral_val_prs = { .base = PRS_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_PRS };
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#endif
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#if defined(RADIOAES_BASE)
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// Define peripheral RADIOAES.
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const sl_peripheral_val_t sl_peripheral_val_radioaes = { .base = RADIOAES_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_RADIOAES };
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#endif
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#if defined(SCRATCHPAD_BASE)
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// Define peripheral SCRATCHPAD.
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const sl_peripheral_val_t sl_peripheral_val_scratchpad = { .base = SCRATCHPAD_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_INVALID };
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#endif
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#if defined(SEMAILBOX_HOST_BASE)
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// Define peripheral SEMAILBOX.
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const sl_peripheral_val_t sl_peripheral_val_semailbox = { .base = SEMAILBOX_HOST_BASE,
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.clk_branch = SL_CLOCK_BRANCH_HCLK,
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.bus_clock = SL_BUS_CLOCK_SEMAILBOX };
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#endif
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#if defined(SMU_BASE)
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// Define peripheral SMU.
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const sl_peripheral_val_t sl_peripheral_val_smu = { .base = SMU_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_SMU };
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#endif
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#if defined(SYSCFG_BASE)
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// Define peripheral SYSCFG.
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const sl_peripheral_val_t sl_peripheral_val_syscfg = { .base = SYSCFG_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_SYSCFG };
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#endif
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#if defined(SYSRTC0_BASE)
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// Define peripheral SYSRTC0.
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const sl_peripheral_val_t sl_peripheral_val_sysrtc0 = { .base = SYSRTC0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_SYSRTCCLK,
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.bus_clock = SL_BUS_CLOCK_SYSRTC0 };
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#endif
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#if defined(TIMER0_BASE)
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// Define peripheral TIMER0.
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const sl_peripheral_val_t sl_peripheral_val_timer0 = { .base = TIMER0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_TIMER0 };
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#endif
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#if defined(TIMER1_BASE)
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// Define peripheral TIMER1.
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const sl_peripheral_val_t sl_peripheral_val_timer1 = { .base = TIMER1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_TIMER1 };
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#endif
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#if defined(TIMER2_BASE)
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// Define peripheral TIMER2.
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const sl_peripheral_val_t sl_peripheral_val_timer2 = { .base = TIMER2_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_TIMER2 };
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#endif
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#if defined(TIMER3_BASE)
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// Define peripheral TIMER3.
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const sl_peripheral_val_t sl_peripheral_val_timer3 = { .base = TIMER3_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_TIMER3 };
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#endif
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#if defined(TIMER4_BASE)
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// Define peripheral TIMER4.
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const sl_peripheral_val_t sl_peripheral_val_timer4 = { .base = TIMER4_BASE,
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.clk_branch = SL_CLOCK_BRANCH_EM01GRPACLK,
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.bus_clock = SL_BUS_CLOCK_TIMER4 };
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#endif
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#if defined(ULFRCO_BASE)
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// Define peripheral ULFRCO.
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const sl_peripheral_val_t sl_peripheral_val_ulfrco = { .base = ULFRCO_BASE,
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.clk_branch = SL_CLOCK_BRANCH_INVALID,
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.bus_clock = SL_BUS_CLOCK_ULFRCO };
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#endif
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#if defined(USART0_BASE)
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// Define peripheral USART0.
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const sl_peripheral_val_t sl_peripheral_val_usart0 = { .base = USART0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_PCLK,
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.bus_clock = SL_BUS_CLOCK_USART0 };
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#endif
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#if defined(VDAC0_BASE)
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// Define peripheral VDAC0.
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const sl_peripheral_val_t sl_peripheral_val_vdac0 = { .base = VDAC0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_VDAC0CLK,
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.bus_clock = SL_BUS_CLOCK_VDAC0 };
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#endif
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#if defined(VDAC1_BASE)
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// Define peripheral VDAC1.
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const sl_peripheral_val_t sl_peripheral_val_vdac1 = { .base = VDAC1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_VDAC1CLK,
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.bus_clock = SL_BUS_CLOCK_VDAC1 };
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#endif
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#if defined(WDOG0_BASE)
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// Define peripheral WDOG0.
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const sl_peripheral_val_t sl_peripheral_val_wdog0 = { .base = WDOG0_BASE,
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.clk_branch = SL_CLOCK_BRANCH_WDOG0CLK,
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.bus_clock = SL_BUS_CLOCK_WDOG0 };
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#endif
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#if defined(WDOG1_BASE)
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// Define peripheral WDOG1.
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const sl_peripheral_val_t sl_peripheral_val_wdog1 = { .base = WDOG1_BASE,
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.clk_branch = SL_CLOCK_BRANCH_WDOG1CLK,
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.bus_clock = SL_BUS_CLOCK_WDOG1 };
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#endif
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/** @} (end addtogroup device_peripheral) */
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