83 lines
2.8 KiB
C
83 lines
2.8 KiB
C
/***************************************************************************//**
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* @file
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* @brief Packet Trace Information configuration file.
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*******************************************************************************
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* # License
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* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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******************************************************************************/
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#ifndef SL_RAIL_UTIL_PTI_CONFIG_H
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#define SL_RAIL_UTIL_PTI_CONFIG_H
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#include "rail_types.h"
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> PTI Configuration
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// <o SL_RAIL_UTIL_PTI_MODE> PTI mode
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// <RAIL_PTI_MODE_UART=> UART
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// <RAIL_PTI_MODE_UART_ONEWIRE=> UART onewire
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// <RAIL_PTI_MODE_SPI=> SPI
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// <RAIL_PTI_MODE_DISABLED=> Disabled
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// <i> Default: RAIL_PTI_MODE_UART
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#define SL_RAIL_UTIL_PTI_MODE RAIL_PTI_MODE_UART
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// <o SL_RAIL_UTIL_PTI_BAUD_RATE_HZ> PTI Baud Rate (Hertz)
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// <147800-20000000:1>
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// <i> Default: 1600000
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#define SL_RAIL_UTIL_PTI_BAUD_RATE_HZ 1600000
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// </h>
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// <<< end of configuration section >>>
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// <<< sl:start pin_tool >>>
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// <pti signal=DOUT,(DFRAME),(DCLK)> SL_RAIL_UTIL_PTI
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// $[PTI_SL_RAIL_UTIL_PTI]
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#ifndef SL_RAIL_UTIL_PTI_PERIPHERAL
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#define SL_RAIL_UTIL_PTI_PERIPHERAL PTI
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#endif
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// PTI DOUT on PC06
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#ifndef SL_RAIL_UTIL_PTI_DOUT_PORT
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#define SL_RAIL_UTIL_PTI_DOUT_PORT SL_GPIO_PORT_C
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#endif
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#ifndef SL_RAIL_UTIL_PTI_DOUT_PIN
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#define SL_RAIL_UTIL_PTI_DOUT_PIN 6
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#endif
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// PTI DFRAME on PC07
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#ifndef SL_RAIL_UTIL_PTI_DFRAME_PORT
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#define SL_RAIL_UTIL_PTI_DFRAME_PORT SL_GPIO_PORT_C
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#endif
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#ifndef SL_RAIL_UTIL_PTI_DFRAME_PIN
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#define SL_RAIL_UTIL_PTI_DFRAME_PIN 7
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#endif
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// [PTI_SL_RAIL_UTIL_PTI]$
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// <<< sl:end pin_tool >>>
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#endif // SL_RAIL_UTIL_PTI_CONFIG_H
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